IntelFrameworkModulePkg: Clean up source files

[mirror_edk2.git] / IntelFrameworkModulePkg / Csm / LegacyBiosDxe / LegacyBiosInterface.h

diff --git a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h
index bbd074b56c22acff2673655fde372a8201e075d8..497a71190f27c7dfdb525807895b089948e0e2a4 100644 (file)
--- a/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h
+++ b/IntelFrameworkModulePkg/Csm/LegacyBiosDxe/LegacyBiosInterface.h
@@ -1,6 +1,6 @@
 /** @file\r
 \r
-Copyright (c) 2006 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
 \r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions\r
@@ -47,6 +47,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include <Protocol/PciRootBridgeIo.h>\r
 #include <Protocol/SerialIo.h>\r
 #include <Protocol/SuperIo.h>\r
+#include <Protocol/IoMmu.h>\r
 \r
 #include <Library/BaseLib.h>\r
 #include <Library/DebugLib.h>\r
@@ -100,9 +101,9 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #define PROTECTED_MODE_BASE_VECTOR_SLAVE   0x70\r
 \r
 //\r
-// When we call CSM16 functions, some CSM16 use es:[offset + 0xabcd] to get data passed from CSM32, \r
-// offset + 0xabcd could overflow which exceeds 0xFFFF which is invalid in real mode. \r
-// So this will keep offset as small as possible to avoid offset overflow in real mode. \r
+// When we call CSM16 functions, some CSM16 use es:[offset + 0xabcd] to get data passed from CSM32,\r
+// offset + 0xabcd could overflow which exceeds 0xFFFF which is invalid in real mode.\r
+// So this will keep offset as small as possible to avoid offset overflow in real mode.\r
 //\r
 #define NORMALIZE_EFI_SEGMENT(_Adr)      (UINT16) (((UINTN) (_Adr)) >> 4)\r
 #define NORMALIZE_EFI_OFFSET(_Adr)       (UINT16) (((UINT16) ((UINTN) (_Adr))) & 0xf)\r
@@ -508,6 +509,8 @@ extern BBS_TABLE           *mBbsTable;
 \r
 extern EFI_GENERIC_MEMORY_TEST_PROTOCOL *gGenMemoryTest;\r
 \r
+extern BOOLEAN mEndOfDxe;\r
+\r
 #define PORT_70 0x70\r
 #define PORT_71 0x71\r
 \r
@@ -541,7 +544,7 @@ extern EFI_GENERIC_MEMORY_TEST_PROTOCOL *gGenMemoryTest;
 //\r
 // Timer 0, Read/Write LSB then MSB, Square wave output, binary count use.\r
 //\r
-#define TIMER0_CONTROL_WORD         0x36      \r
+#define TIMER0_CONTROL_WORD         0x36\r
 \r
 #define LEGACY_BIOS_INSTANCE_SIGNATURE  SIGNATURE_32 ('L', 'B', 'I', 'T')\r
 typedef struct {\r
@@ -553,16 +556,16 @@ typedef struct {
   EFI_HANDLE                        ImageHandle;\r
 \r
   //\r
-  // CPU Architectural Protocol \r
+  // CPU Architectural Protocol\r
   //\r
   EFI_CPU_ARCH_PROTOCOL             *Cpu;\r
 \r
   //\r
-  // Timer Architectural Protocol \r
+  // Timer Architectural Protocol\r
   //\r
   EFI_TIMER_ARCH_PROTOCOL           *Timer;\r
-  BOOLEAN                           TimerUses8254; \r
-  \r
+  BOOLEAN                           TimerUses8254;\r
+\r
   //\r
   // Protocol to Lock and Unlock 0xc0000 - 0xfffff\r
   //\r
@@ -574,7 +577,7 @@ typedef struct {
   // Interrupt control for thunk and PCI IRQ\r
   //\r
   EFI_LEGACY_8259_PROTOCOL          *Legacy8259;\r
-  \r
+\r
   //\r
   // PCI Interrupt PIRQ control\r
   //\r
@@ -670,7 +673,7 @@ typedef struct {
   //\r
   // Indicate that whether GenericLegacyBoot is entered or not\r
   //\r
-  BOOLEAN                           LegacyBootEntered;                              \r
+  BOOLEAN                           LegacyBootEntered;\r
 \r
   //\r
   // CSM16 PCI Interface Version\r
@@ -826,7 +829,7 @@ LegacyBiosFarCall86 (
   @param  RomSize                Size of ROM Image\r
   @param  Flags                  Indicates if ROM found and if PC-AT.\r
 \r
-  @retval EFI_SUCCESS            Legacy Option ROM availible for this device\r
+  @retval EFI_SUCCESS            Legacy Option ROM available for this device\r
   @retval EFI_UNSUPPORTED        Legacy Option ROM not supported.\r
 \r
 **/\r
@@ -1258,10 +1261,10 @@ GenerateSoftInit (
   );\r
 \r
 /**\r
-  Do an AllocatePages () of type AllocateMaxAddress for EfiBootServicesCode\r
-  memory.\r
+  Allocate memory for legacy usage.\r
 \r
-  @param  AllocateType               Allocated Legacy Memory Type\r
+  @param  AllocateType               The type of allocation to perform.\r
+  @param  MemoryType                 The type of memory to allocate.\r
   @param  StartPageAddress           Start address of range\r
   @param  Pages                      Number of pages to allocate\r
   @param  Result                     Result of allocation\r
@@ -1273,6 +1276,7 @@ GenerateSoftInit (
 EFI_STATUS\r
 AllocateLegacyMemory (\r
   IN  EFI_ALLOCATE_TYPE         AllocateType,\r
+  IN  EFI_MEMORY_TYPE           MemoryType,\r
   IN  EFI_PHYSICAL_ADDRESS      StartPageAddress,\r
   IN  UINTN                     Pages,\r
   OUT EFI_PHYSICAL_ADDRESS      *Result\r
@@ -1346,7 +1350,7 @@ ShadowAndStartLegacy16 (
 \r
 /**\r
   Checks the state of the floppy and if media is inserted.\r
-  \r
+\r
   This routine checks the state of the floppy and if media is inserted.\r
   There are 3 cases:\r
   No floppy present         - Set BBS entry to ignore\r
@@ -1463,7 +1467,7 @@ LegacyCalculateWriteStandardCmosChecksum (
   @param[out] OpromRevision          Revision of the PCI Rom\r
   @param[out] ConfigUtilityCodeHeaderPointer of Configuration Utility Code Header\r
 \r
-  @return EFI_SUCCESS            Legacy Option ROM availible for this device\r
+  @return EFI_SUCCESS            Legacy Option ROM available for this device\r
   @return EFI_ALREADY_STARTED    This device is already managed by its Oprom\r
   @return EFI_UNSUPPORTED        Legacy Option ROM not supported.\r
 \r