/** @file\r
\r
-Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions\r
-of the BSD License which accompanies this distribution. The\r
-full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
BOOLEAN mVgaInstallationInProgress = FALSE;\r
UINT32 mRomCount = 0x00;\r
ROM_INSTANCE_ENTRY mRomEntry[ROM_MAX_ENTRIES];\r
-\r
+EDKII_IOMMU_PROTOCOL *mIoMmu;\r
\r
/**\r
Query shadowed legacy ROM parameters registered by RomShadow() previously.\r
RomShadow (\r
IN EFI_HANDLE PciHandle,\r
IN UINT32 ShadowAddress,\r
- IN UINT32 ShadowedSize, \r
+ IN UINT32 ShadowedSize,\r
IN UINT8 DiskStart,\r
IN UINT8 DiskEnd\r
)\r
}\r
\r
/**\r
- Find the PC-AT ROM Image in the raw PCI Option ROM. Also return the \r
+ Find the PC-AT ROM Image in the raw PCI Option ROM. Also return the\r
related information from the header.\r
\r
@param Csm16Revision The PCI interface version of underlying CSM16\r
if (((UINTN)RomHeader.Raw - (UINTN)*Rom) + Pcir->ImageLength * 512 > *ImageSize) {\r
break;\r
}\r
- \r
+\r
if (Pcir->CodeType == PCI_CODE_TYPE_PCAT_IMAGE) {\r
Match = FALSE;\r
if (Pcir->VendorId == VendorId) {\r
DEBUG ((EFI_D_ERROR, "GetPciLegacyRom - OpRom not match (%04x-%04x)\n", (UINTN)VendorId, (UINTN)DeviceId));\r
}\r
}\r
- \r
+\r
if ((Pcir->Indicator & 0x80) == 0x80) {\r
break;\r
} else {\r
}\r
\r
if (OpRomRevision != NULL) {\r
- // \r
+ //\r
// Optional return PCI Data Structure revision\r
//\r
if (Pcir->Length >= 0x1C) {\r
//\r
Regs.X.BX = (UINT16) 0x1;\r
//\r
- // 16-byte boundary alignment requirement according to \r
+ // 16-byte boundary alignment requirement according to\r
// PCI IRQ Routing Table Specification\r
//\r
Regs.X.DX = 0x10;\r
if (Regs.X.AX != 0) {\r
DEBUG ((EFI_D_ERROR, "PIRQ table length insufficient - %x\n", PirqTableSize));\r
} else {\r
- DEBUG ((EFI_D_INFO, "PIRQ table in legacy region - %x\n", Private->Legacy16Table->IrqRoutingTablePointer)); \r
+ DEBUG ((EFI_D_INFO, "PIRQ table in legacy region - %x\n", Private->Legacy16Table->IrqRoutingTablePointer));\r
Private->Legacy16Table->IrqRoutingTableLength = (UINT32)PirqTableSize;\r
CopyMem (\r
(VOID *) (UINTN)Private->Legacy16Table->IrqRoutingTablePointer,\r
&HandleBuffer,\r
&HandleCount,\r
NULL\r
- ); \r
+ );\r
if (EFI_ERROR (Status)) {\r
return EFI_UNSUPPORTED;\r
}\r
- \r
+\r
VgaHandle = HandleBuffer[0];\r
\r
Status = gBS->LocateHandleBuffer (\r
sizeof (Pci) / sizeof (UINT32),\r
&Pci\r
);\r
- \r
+\r
//\r
- // Only one Video OPROM can be given control in BIOS phase. If there are multiple Video devices, \r
- // one will work in legacy mode (OPROM will be given control) and \r
+ // Only one Video OPROM can be given control in BIOS phase. If there are multiple Video devices,\r
+ // one will work in legacy mode (OPROM will be given control) and\r
// other Video devices will work in native mode (OS driver will handle these devices).\r
- // \r
- if (IS_PCI_DISPLAY (&Pci) && Index != 0) { \r
+ //\r
+ if (IS_PCI_DISPLAY (&Pci) && Index != 0) {\r
continue;\r
}\r
//\r
if (!EFI_ERROR (Status)) {\r
continue;\r
}\r
- \r
+\r
//\r
// If legacy VBIOS Oprom has not been dispatched before, install legacy VBIOS here.\r
//\r
- if (IS_PCI_DISPLAY (&Pci) && Index == 0) { \r
+ if (IS_PCI_DISPLAY (&Pci) && Index == 0) {\r
Status = LegacyBiosInstallVgaRom (Private);\r
//\r
// A return status of EFI_NOT_FOUND is considered valid (No EFI\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- \r
+\r
for (Index = 0; Index < EntryCount; Index++) {\r
if ((OpenInfoBuffer[Index].Attributes & EFI_OPEN_PROTOCOL_BY_DRIVER) != 0) {\r
Status = gBS->HandleProtocol (\r
}\r
}\r
}\r
- \r
+\r
//\r
// Kick off the native EFI driver\r
//\r
UINTN Function;\r
EFI_IA32_REGISTER_SET Regs;\r
UINT8 VideoMode;\r
+ UINT8 OldVideoMode;\r
EFI_TIME BootTime;\r
UINT32 *BdaPtr;\r
UINT32 LocalTime;\r
Device = 0;\r
Function = 0;\r
VideoMode = 0;\r
+ OldVideoMode = 0;\r
PhysicalAddress = 0;\r
MaxRomAddr = PcdGet32 (PcdEndOpromShadowAddress);\r
\r
if ((Private->Legacy16Table->TableLength >= OFFSET_OF(EFI_COMPATIBILITY16_TABLE, HiPermanentMemoryAddress)) &&\r
- (Private->Legacy16Table->UmaAddress != 0) && \r
+ (Private->Legacy16Table->UmaAddress != 0) &&\r
(Private->Legacy16Table->UmaSize != 0) &&\r
(MaxRomAddr > (Private->Legacy16Table->UmaAddress))) {\r
MaxRomAddr = Private->Legacy16Table->UmaAddress;\r
EFI_SIZE_TO_PAGES (ImageSize),\r
&PhysicalAddress\r
);\r
- \r
+\r
if (EFI_ERROR (Status)) {\r
DEBUG ((EFI_D_ERROR, "return LegacyBiosInstallRom(%d): EFI_OUT_OF_RESOURCES (no more space for OpROM)\n", __LINE__));\r
//\r
(UINT32) ImageSize,\r
&Granularity\r
);\r
- \r
+\r
DEBUG ((EFI_D_INFO, " Shadowing OpROM init/runtime/isize = %x/%x/%x\n", InitAddress, RuntimeAddress, ImageSize));\r
\r
CopyMem ((VOID *) InitAddress, RomImage, ImageSize);\r
// 2. BBS compliants drives will not change 40:75 until boot time.\r
// 3. Onboard IDE controllers will change 40:75\r
//\r
- LocalDiskStart = (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80);\r
- if ((Private->Disk4075 + 0x80) < LocalDiskStart) {\r
- //\r
- // Update table since onboard IDE drives found\r
- //\r
- Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciSegment = 0xff;\r
- Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciBus = 0xff;\r
- Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciDevice = 0xff;\r
- Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciFunction = 0xff;\r
- Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].StartDriveNumber = (UINT8) (Private->Disk4075 + 0x80);\r
- Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].EndDriveNumber = LocalDiskStart;\r
- Private->LegacyEfiHddTableIndex ++;\r
- Private->Disk4075 = (UINT8) (LocalDiskStart & 0x7f);\r
- Private->DiskEnd = LocalDiskStart;\r
- }\r
+ ACCESS_PAGE0_CODE (\r
+ LocalDiskStart = (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80);\r
+ if ((Private->Disk4075 + 0x80) < LocalDiskStart) {\r
+ //\r
+ // Update table since onboard IDE drives found\r
+ //\r
+ Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciSegment = 0xff;\r
+ Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciBus = 0xff;\r
+ Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciDevice = 0xff;\r
+ Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].PciFunction = 0xff;\r
+ Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].StartDriveNumber = (UINT8) (Private->Disk4075 + 0x80);\r
+ Private->LegacyEfiHddTable[Private->LegacyEfiHddTableIndex].EndDriveNumber = LocalDiskStart;\r
+ Private->LegacyEfiHddTableIndex ++;\r
+ Private->Disk4075 = (UINT8) (LocalDiskStart & 0x7f);\r
+ Private->DiskEnd = LocalDiskStart;\r
+ }\r
\r
- if (PciHandle != mVgaHandle) {\r
+ if (PciHandle != mVgaHandle) {\r
\r
- EnablePs2Keyboard ();\r
+ EnablePs2Keyboard ();\r
+\r
+ //\r
+ // Store current mode settings since PrepareToScanRom may change mode.\r
+ //\r
+ VideoMode = *(UINT8 *) ((UINTN) (0x400 + BDA_VIDEO_MODE));\r
+ }\r
+ );\r
\r
- //\r
- // Store current mode settings since PrepareToScanRom may change mode.\r
- //\r
- VideoMode = *(UINT8 *) ((UINTN) (0x400 + BDA_VIDEO_MODE));\r
- }\r
//\r
// Notify the platform that we are about to scan the ROM\r
//\r
//\r
gRT->GetTime (&BootTime, NULL);\r
LocalTime = BootTime.Hour * 3600 + BootTime.Minute * 60 + BootTime.Second;\r
- \r
+\r
//\r
// Multiply result by 18.2 for number of ticks since midnight.\r
// Use 182/10 to avoid floating point math.\r
//\r
- LocalTime = (LocalTime * 182) / 10;\r
- BdaPtr = (UINT32 *) ((UINTN) 0x46C);\r
- *BdaPtr = LocalTime;\r
- \r
+ ACCESS_PAGE0_CODE (\r
+ LocalTime = (LocalTime * 182) / 10;\r
+ BdaPtr = (UINT32 *) ((UINTN) 0x46C);\r
+ *BdaPtr = LocalTime;\r
+ );\r
+\r
//\r
// Pass in handoff data\r
//\r
PciEnableStatus = EFI_UNSUPPORTED;\r
ZeroMem (&Regs, sizeof (Regs));\r
if (PciHandle != NULL) {\r
- \r
+\r
Status = gBS->HandleProtocol (\r
PciHandle,\r
&gEfiPciIoProtocolGuid,\r
(VOID **) &PciIo\r
);\r
ASSERT_EFI_ERROR (Status);\r
- \r
+\r
//\r
// Enable command register.\r
//\r
EFI_PCI_DEVICE_ENABLE,\r
NULL\r
);\r
- \r
+\r
PciIo->GetLocation (\r
PciIo,\r
&Segment,\r
);\r
DEBUG ((EFI_D_INFO, "Shadowing OpROM on the PCI device %x/%x/%x\n", Bus, Device, Function));\r
}\r
- \r
+\r
mIgnoreBbsUpdateFlag = FALSE;\r
Regs.X.AX = Legacy16DispatchOprom;\r
- \r
+\r
//\r
// Generate DispatchOpRomTable data\r
//\r
} else {\r
Regs.X.BX = 0;\r
}\r
- \r
+\r
if (Private->IntThunk->DispatchOpromTable.NumberBbsEntries != (UINT8) Private->IntThunk->EfiToLegacy16BootTable.NumberBbsEntries) {\r
Private->IntThunk->EfiToLegacy16BootTable.NumberBbsEntries = (UINT8) Private->IntThunk->DispatchOpromTable.NumberBbsEntries;\r
mIgnoreBbsUpdateFlag = TRUE;\r
//\r
// Set mode settings since PrepareToScanRom may change mode\r
//\r
- if (VideoMode != *(UINT8 *) ((UINTN) (0x400 + BDA_VIDEO_MODE))) {\r
+ ACCESS_PAGE0_CODE ({\r
+ OldVideoMode = *(UINT8 *) ((UINTN) (0x400 + BDA_VIDEO_MODE));\r
+ });\r
+\r
+ if (VideoMode != OldVideoMode) {\r
//\r
// The active video mode is changed, restore it to original mode.\r
//\r
}\r
}\r
\r
- LocalDiskEnd = (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80);\r
- \r
+ ACCESS_PAGE0_CODE (\r
+ LocalDiskEnd = (UINT8) ((*(UINT8 *) ((UINTN) 0x475)) + 0x80);\r
+ );\r
+\r
//\r
// Allow platform to perform any required actions after the\r
// OPROM has been initialized.\r
Private->OptionRom = (UINT32) (RuntimeAddress + *RuntimeImageLength);\r
\r
Status = EFI_SUCCESS;\r
- \r
+\r
Done:\r
if (PhysicalAddress != 0) {\r
//\r
return Status;\r
}\r
\r
+/**\r
+ Let IOMMU grant DMA access for the PCI device.\r
+\r
+ @param PciHandle The EFI handle for the PCI device.\r
+ @param HostAddress The system memory address to map to the PCI controller.\r
+ @param NumberOfBytes The number of bytes to map.\r
+\r
+ @retval EFI_SUCCESS The DMA access is granted.\r
+**/\r
+EFI_STATUS\r
+IoMmuGrantAccess (\r
+ IN EFI_HANDLE PciHandle,\r
+ IN EFI_PHYSICAL_ADDRESS HostAddress,\r
+ IN UINTN NumberOfBytes\r
+ )\r
+{\r
+ EFI_PHYSICAL_ADDRESS DeviceAddress;\r
+ VOID *Mapping;\r
+ EFI_STATUS Status;\r
+\r
+ if (PciHandle == NULL) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ Status = EFI_SUCCESS;\r
+ if (mIoMmu == NULL) {\r
+ gBS->LocateProtocol (&gEdkiiIoMmuProtocolGuid, NULL, (VOID **)&mIoMmu);\r
+ }\r
+ if (mIoMmu != NULL) {\r
+ Status = mIoMmu->Map (\r
+ mIoMmu,\r
+ EdkiiIoMmuOperationBusMasterCommonBuffer,\r
+ (VOID *)(UINTN)HostAddress,\r
+ &NumberOfBytes,\r
+ &DeviceAddress,\r
+ &Mapping\r
+ );\r
+ if (EFI_ERROR(Status)) {\r
+ DEBUG ((DEBUG_ERROR, "LegacyPci - IoMmuMap - %r\n", Status));\r
+ } else {\r
+ ASSERT (DeviceAddress == HostAddress);\r
+ Status = mIoMmu->SetAttribute (\r
+ mIoMmu,\r
+ PciHandle,\r
+ Mapping,\r
+ EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE\r
+ );\r
+ if (EFI_ERROR(Status)) {\r
+ DEBUG ((DEBUG_ERROR, "LegacyPci - IoMmuSetAttribute - %r\n", Status));\r
+ }\r
+ }\r
+ }\r
+ return Status;\r
+}\r
+\r
/**\r
Load a legacy PC-AT OPROM on the PciHandle device. Return information\r
about how many disks were added by the OPROM and the shadow address and\r
*Flags = 0;\r
if ((PciHandle != NULL) && (RomImage == NULL)) {\r
//\r
- // If PciHandle has OpRom to Execute \r
+ // If PciHandle has OpRom to Execute\r
// and OpRom are all associated with Hardware\r
//\r
Status = gBS->HandleProtocol (\r
mVgaInstallationInProgress = FALSE;\r
return EFI_UNSUPPORTED;\r
}\r
- \r
+\r
Pcir = (PCI_3_0_DATA_STRUCTURE *)\r
((UINT8 *) LocalRomImage + ((PCI_EXPANSION_ROM_HEADER *) LocalRomImage)->PcirOffset);\r
\r
RuntimeImageLength = Pcir->MaxRuntimeImageLength * 512;\r
}\r
}\r
+\r
+ //\r
+ // Grant access for below 1M\r
+ // BDA/EBDA/LowPMM and scratch memory for OPROM.\r
+ //\r
+ IoMmuGrantAccess (PciHandle, 0, SIZE_1MB);\r
+ //\r
+ // Grant access for HiPmm\r
+ //\r
+ IoMmuGrantAccess (\r
+ PciHandle,\r
+ Private->IntThunk->EfiToLegacy16InitTable.HiPmmMemory,\r
+ Private->IntThunk->EfiToLegacy16InitTable.HiPmmMemorySizeInBytes\r
+ );\r
+\r
//\r
// Shadow and initialize the OpROM.\r
//\r
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