ISA I/O Protocol is used by ISA device drivers to perform I/O, MMIO and DMA \r
operations on the ISA controllers they manage.\r
\r
- Copyright (c) 2006 - 2009, Intel Corporation\r
- All rights reserved. This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials are licensed and made available under \r
+the terms and conditions of the BSD License that accompanies this distribution. \r
+The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php. \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
}\r
\r
///\r
-/// Forward declaration for the EFI_ISA_IO_PROTOCOL\r
+/// Forward declaration for the EFI_ISA_IO_PROTOCOL.\r
///\r
typedef struct _EFI_ISA_IO_PROTOCOL EFI_ISA_IO_PROTOCOL;\r
\r
///\r
-/// Width of EFI_ISA_IO_PROTOCOL I/O Port and MMIO operations\r
+/// Width of EFI_ISA_IO_PROTOCOL I/O Port and MMIO operations.\r
///\r
typedef enum {\r
- EfiIsaIoWidthUint8 = 0, ///< 8-bit operation\r
- EfiIsaIoWidthUint16, ///< 16-bit operation\r
+ EfiIsaIoWidthUint8 = 0, ///< 8-bit operation.\r
+ EfiIsaIoWidthUint16, ///< 16-bit operation.\r
EfiIsaIoWidthUint32, ///< 32-bit operation\r
EfiIsaIoWidthReserved,\r
- EfiIsaIoWidthFifoUint8, ///< 8-bit FIFO operation\r
- EfiIsaIoWidthFifoUint16, ///< 16-bit FIFO operation\r
- EfiIsaIoWidthFifoUint32, ///< 32-bit FIFO operation\r
+ EfiIsaIoWidthFifoUint8, ///< 8-bit FIFO operation.\r
+ EfiIsaIoWidthFifoUint16, ///< 16-bit FIFO operation.\r
+ EfiIsaIoWidthFifoUint32, ///< 32-bit FIFO operation.\r
EfiIsaIoWidthFifoReserved,\r
- EfiIsaIoWidthFillUint8, ///< 8-bit Fill operation\r
- EfiIsaIoWidthFillUint16, ///< 16-bit Fill operation\r
- EfiIsaIoWidthFillUint32, ///< 32-bit Fill operation\r
+ EfiIsaIoWidthFillUint8, ///< 8-bit Fill operation.\r
+ EfiIsaIoWidthFillUint16, ///< 16-bit Fill operation.\r
+ EfiIsaIoWidthFillUint32, ///< 32-bit Fill operation.\r
EfiIsaIoWidthFillReserved,\r
EfiIsaIoWidthMaximum\r
} EFI_ISA_IO_PROTOCOL_WIDTH;\r
\r
///\r
-/// Attributes for the EFI_ISA_IO_PROTOCOL common DMA buffer allocations\r
+/// Attributes for the EFI_ISA_IO_PROTOCOL common DMA buffer allocations.\r
///\r
-#define EFI_ISA_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x080 ///< Map a memory range so write are combined\r
-#define EFI_ISA_IO_ATTRIBUTE_MEMORY_CACHED 0x800 ///< Map a memory range so all read and write accesses are cached\r
-#define EFI_ISA_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range \r
+#define EFI_ISA_IO_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x080 ///< Map a memory range so write are combined.\r
+#define EFI_ISA_IO_ATTRIBUTE_MEMORY_CACHED 0x800 ///< Map a memory range so all read and write accesses are cached.\r
+#define EFI_ISA_IO_ATTRIBUTE_MEMORY_DISABLE 0x1000 ///< Disable a memory range.\r
\r
///\r
/// Channel attribute for EFI_ISA_IO_PROTOCOL slave DMA requests\r
///\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_COMPATIBLE 0x001 ///< Set the speed of the DMA transfer in compatible mode\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_A 0x002 ///< Not supported\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_B 0x004 ///< Not supported\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_C 0x008 ///< Not supported\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_WIDTH_8 0x010 ///< Request 8-bit DMA transfers. Only available on channels 0..3\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_WIDTH_16 0x020 ///< Request 16-bit DMA transfers. Only available on channels 4..7\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SINGLE_MODE 0x040 ///< Request a single DMA transfer\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_DEMAND_MODE 0x080 ///< Request multiple DMA transfers until TC (Terminal Count) or EOP (End of Process)\r
-#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_AUTO_INITIALIZE 0x100 ///< Automatically reload base and count at the end of the DMA transfer\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_COMPATIBLE 0x001 ///< Set the speed of the DMA transfer in compatible mode.\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_A 0x002 ///< Not supported.\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_B 0x004 ///< Not supported.\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SPEED_C 0x008 ///< Not supported.\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_WIDTH_8 0x010 ///< Request 8-bit DMA transfers. Only available on channels 0..3.\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_WIDTH_16 0x020 ///< Request 16-bit DMA transfers. Only available on channels 4..7.\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_SINGLE_MODE 0x040 ///< Request a single DMA transfer.\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_DEMAND_MODE 0x080 ///< Request multiple DMA transfers until TC (Terminal Count) or EOP (End of Process).\r
+#define EFI_ISA_IO_SLAVE_DMA_ATTRIBUTE_AUTO_INITIALIZE 0x100 ///< Automatically reload base and count at the end of the DMA transfer.\r
\r
///\r
-/// The DMA opreration type for EFI_ISA_IO_PROTOCOL DMA requests\r
+/// The DMA opreration type for EFI_ISA_IO_PROTOCOL DMA requests.\r
///\r
typedef enum {\r
///\r
);\r
\r
///\r
-/// Structure of functions for accessing ISA I/O and MMIO space\r
+/// Structure of functions for accessing ISA I/O and MMIO space.\r
///\r
typedef struct {\r
///\r
\r
@param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.\r
@param[in] Width Specifies the width of the MMIO copy operation.\r
- @param[in] DestOffset The offset of the destination in ISA MMIO space\r
- @param[in] SrcOffset The offset of the source in ISA MMIO space\r
- @param[in] Count The number tranfers to perform for this copy operation\r
+ @param[in] DestOffset The offset of the destination in ISA MMIO space.\r
+ @param[in] SrcOffset The offset of the source in ISA MMIO space.\r
+ @param[in] Count The number tranfers to perform for this copy operation.\r
\r
@retval EFI_SUCCESS The data was copied sucessfully.\r
@retval EFI_UNSUPPORTED The DestOffset or SrcOffset is not valid for this device.\r
);\r
\r
/**\r
- Unmaps a memory region that was previously mapped with EFI_ISA_IO_PROTOCOL.Map()\r
+ Unmaps a memory region that was previously mapped with EFI_ISA_IO_PROTOCOL.Map().\r
\r
The EFI_ISA_IO_PROTOCOL.Map() operation is completed and any corresponding \r
resources are released. If the operation was EfiIsaIoOperationSlaveWrite \r
\r
@retval EFI_SUCCESS The requested memory pages were allocated.\r
@retval EFI_INVALID_PARAMETER Type is invalid.\r
- @retval EFI_INVALID_PARAMETER MemoryType is invalid\r
- @retval EFI_INVALID_PARAMETER HostAddress is NULL\r
+ @retval EFI_INVALID_PARAMETER MemoryType is invalid.\r
+ @retval EFI_INVALID_PARAMETER HostAddress is NULL.\r
@retval EFI_UNSUPPORTED Attributes is unsupported.\r
@retval EFI_UNSUPPORTED The memory range specified by HostAddress, Pages,\r
and Type is not available for common buffer use.\r
);\r
\r
/**\r
- Frees a common buffer that was allocated with EFI_ISA_IO_PROTOCOL.AllocateBuffer()\r
+ Frees a common buffer that was allocated with EFI_ISA_IO_PROTOCOL.AllocateBuffer().\r
\r
@param[in] This A pointer to the EFI_ISA_IO_PROTOCOL instance.\r
@param[in] Pages The number of pages to free from the previously allocated common buffer.\r