# Intel Framework Module Package contains the definitions and module implementation\r
# which follows Intel EFI Framework Specification.\r
#\r
-# Copyright (c) 2007 - 2012, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2007 - 2013, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
## The PCD is used to mark whether the machine is in first boot cycle.\r
# TRUE means the machine is in first boot cycle. After completing the first boot,\r
# the PCD's value will be updated to FALSE.\r
+ # This PCD should be set as HII type PCD by platform integrator.\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdBootState|TRUE|BOOLEAN|0x0001002f\r
\r
## Timeout value for displaying progressing bar in before boot OS.\r
# According to UEFI 2.0 spec, the default TimeOut should be 0xffff.\r
+ # This PCD should be set as HII type PCD by platform integrator mapped to variable L"TimeOut" and gEfiGlobalVariableGuid.\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdPlatformBootTimeOut|0xffff|UINT16|0x40000001\r
\r
## Error level for hardware recorder. If value 0, platform does not support feature of hardware error record.\r
- # This PCD should be set as HII type PCD by platform integrator mapped to variable L"HwErrRecSupport"\r
+ # This PCD should be set as HII type PCD by platform integrator mapped to variable L"HwErrRecSupport" and gEfiGlobalVariableGuid.\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdHardwareErrorRecordLevel|0|UINT16|0x40000002\r
\r
[PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]\r
## The value should be a multiple of 4KB.\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x30000005\r
\r
+ ## The PCD is used to specify memory base address for OPROM to find free memory.\r
+ # Some OPROMs do not use EBDA or PMM to allocate memory for its usage, \r
+ # instead they find the memory filled with zero from 0x20000.\r
+ # The value should be a multiple of 4KB.\r
+ # The range should be below the EBDA reserved range from \r
+ # (CONVENTIONAL_MEMORY_TOP - PcdEbdaReservedMemorySize) to CONVENTIONAL_MEMORY_TOP.\r
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x3000000c\r
+ \r
+ ## The PCD is used to specify memory size with bytes for OPROM to find free memory.\r
+ ## The value should be a multiple of 4KB. And the range should be below the EBDA reserved range from \r
+ # (CONVENTIONAL_MEMORY_TOP - PcdEbdaReservedMemorySize) to CONVENTIONAL_MEMORY_TOP.\r
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x3000000d\r
+\r
## The PCD is used to specify memory size with page number for a pre-allocated reserved memory to be used\r
# by PEI in S3 phase. The default size 32K. When changing the value of this PCD, the platform\r
# developer should make sure the memory size is large enough to meet PEI requiremnt in S3 phase.\r
\r
## This PCD specifies whether to use the optimized timing for best PS2 detection performance.\r
# Note this PCD could be set to TRUE for best boot performance and set to FALSE for best device compatibility.\r
- gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdFastPS2Detection|FALSE|BOOLEAN|0x3000000b
\ No newline at end of file
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdFastPS2Detection|FALSE|BOOLEAN|0x3000000b\r