/** @file\r
This file declares PciCfg PPI used to access PCI configuration space in PEI\r
\r
- Copyright (c) 2006, Intel Corporation \r
+ Copyright (c) 2006 - 2009, Intel Corporation \r
All rights reserved. This program and the accompanying materials \r
are licensed and made available under the terms and conditions of the BSD License \r
which accompanies this distribution. The full text of the license may be found at \r
#ifndef __PEI_PCI_CFG_H__\r
#define __PEI_PCI_CFG_H__\r
\r
+#include <Pi/PiPeiCis.h>\r
+//\r
+// Get the common definitions for EFI_PEI_PCI_CFG_PPI_WIDTH.\r
+//\r
+#include <Ppi/PciCfg2.h>\r
+\r
#define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \\r
{ \\r
0xe1f2eba0, 0xf7b9, 0x4a26, {0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (\r
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO)(\r
IN EFI_PEI_SERVICES **PeiServices,\r
IN EFI_PEI_PCI_CFG_PPI *This,\r
IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (\r
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW)(\r
IN EFI_PEI_SERVICES **PeiServices,\r
IN EFI_PEI_PCI_CFG_PPI *This,\r
IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
);\r
\r
/**\r
- @par Ppi Description:\r
The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI \r
controllers behind a PCI root bridge controller.\r
-\r
- @param Read\r
- PCI read services. See the Read() function description.\r
-\r
- @param Write\r
- PCI write services. See the Write() function description.\r
-\r
- @param Modify\r
- PCI read-modify-write services. See the Modify() function description.\r
-\r
**/\r
struct _EFI_PEI_PCI_CFG_PPI {\r
+ ///\r
+ /// PCI read services. See the Read() function description.\r
+ ///\r
EFI_PEI_PCI_CFG_PPI_IO Read;\r
+ \r
+ ///\r
+ /// PCI write services. See the Write() function description.\r
+ ///\r
EFI_PEI_PCI_CFG_PPI_IO Write;\r
+ \r
+ ///\r
+ /// PCI read-modify-write services. See the Modify() function description.\r
+ ///\r
EFI_PEI_PCI_CFG_PPI_RW Modify;\r
};\r
\r