Remove structure declaration for EFI_UGA_PIXEL.

[mirror_edk2.git] / IntelFrameworkPkg / Include / Ppi / PciCfg.h

diff --git a/IntelFrameworkPkg/Include/Ppi/PciCfg.h b/IntelFrameworkPkg/Include/Ppi/PciCfg.h
index 31a8b53fec0e2c03c671516d7a4581c1f200b771..3f4398a3c6e61301a0ef6f335aff621eaa67363e 100644 (file)
--- a/IntelFrameworkPkg/Include/Ppi/PciCfg.h
+++ b/IntelFrameworkPkg/Include/Ppi/PciCfg.h
@@ -1,7 +1,7 @@
 /** @file\r
   This file declares PciCfg PPI used to access PCI configuration space in PEI\r
 \r
-  Copyright (c) 2006, Intel Corporation                                                         \r
+  Copyright (c) 2006 - 2009, Intel Corporation                                                         \r
   All rights reserved. This program and the accompanying materials                          \r
   are licensed and made available under the terms and conditions of the BSD License         \r
   which accompanies this distribution.  The full text of the license may be found at        \r
@@ -21,6 +21,12 @@
 #ifndef __PEI_PCI_CFG_H__\r
 #define __PEI_PCI_CFG_H__\r
 \r
+#include <Pi/PiPeiCis.h>\r
+//\r
+// Get the common definitions for EFI_PEI_PCI_CFG_PPI_WIDTH.\r
+//\r
+#include <Ppi/PciCfg2.h>\r
+\r
 #define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \\r
   { \\r
     0xe1f2eba0, 0xf7b9, 0x4a26, {0x86, 0x20, 0x13, 0x12, 0x21, 0x64, 0x2a, 0x90 } \\r
@@ -48,7 +54,7 @@ typedef struct _EFI_PEI_PCI_CFG_PPI   EFI_PEI_PCI_CFG_PPI;
 **/\r
 typedef\r
 EFI_STATUS\r
-(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (\r
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO)(\r
   IN EFI_PEI_SERVICES             **PeiServices,\r
   IN EFI_PEI_PCI_CFG_PPI          *This,\r
   IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,\r
@@ -72,7 +78,7 @@ EFI_STATUS
 **/\r
 typedef\r
 EFI_STATUS\r
-(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (\r
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW)(\r
   IN EFI_PEI_SERVICES             **PeiServices,\r
   IN EFI_PEI_PCI_CFG_PPI          *This,\r
   IN EFI_PEI_PCI_CFG_PPI_WIDTH    Width,\r
@@ -82,23 +88,23 @@ EFI_STATUS
   );\r
 \r
 /**\r
-  @par Ppi Description:\r
   The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI \r
   controllers behind a PCI root bridge controller.\r
-\r
-  @param Read\r
-  PCI read services.  See the Read() function description.\r
-\r
-  @param Write\r
-  PCI write services.  See the Write() function description.\r
-\r
-  @param Modify\r
-  PCI read-modify-write services.  See the Modify() function description.\r
-\r
 **/\r
 struct _EFI_PEI_PCI_CFG_PPI {\r
+  ///\r
+  /// PCI read services.  See the Read() function description.\r
+  ///\r
   EFI_PEI_PCI_CFG_PPI_IO  Read;\r
+  \r
+  ///\r
+  /// PCI write services.  See the Write() function description.\r
+  ///\r
   EFI_PEI_PCI_CFG_PPI_IO  Write;\r
+  \r
+  ///\r
+  /// PCI read-modify-write services.  See the Modify() function description.\r
+  ///\r
   EFI_PEI_PCI_CFG_PPI_RW  Modify;\r
 };\r
 \r