/** @file\r
- This file declares PciCfg PPI used to access PCI configuration space in PEI\r
+ This file declares the PciCfg PPI used to access the PCI configuration space in PEI\r
\r
- Copyright (c) 2006, Intel Corporation \r
- All rights reserved. This program and the accompanying materials \r
- are licensed and made available under the terms and conditions of the BSD License \r
- which accompanies this distribution. The full text of the license may be found at \r
- http://opensource.org/licenses/bsd-license.php \r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials are licensed and made available under\r
+the terms and conditions of the BSD License that accompanies this distribution.\r
+The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php.\r
\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
-\r
- Module Name: PciCfg.h\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
@par Revision Reference:\r
This PPI is defined in PEI CIS\r
#ifndef __PEI_PCI_CFG_H__\r
#define __PEI_PCI_CFG_H__\r
\r
-#include <Pi/PiPeiCis.h>\r
+#include <Ppi/PciCfg2.h>\r
//\r
// Get the common definitions for EFI_PEI_PCI_CFG_PPI_WIDTH.\r
//\r
-#include <Ppi/PciCfg2.h>\r
\r
#define EFI_PEI_PCI_CFG_PPI_INSTALLED_GUID \\r
{ \\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO) (\r
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_IO)(\r
IN EFI_PEI_SERVICES **PeiServices,\r
IN EFI_PEI_PCI_CFG_PPI *This,\r
IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
\r
@param PeiServices An indirect pointer to the PEI Services Table\r
published by the PEI Foundation.\r
- @param This Pointer to local data for the interface.\r
+ @param This The pointer to local data for the interface.\r
@param Width The width of the access. Enumerated in bytes.\r
@param Address The physical address of the access.\r
@param SetBits Value of the bits to set.\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW) (\r
+(EFIAPI *EFI_PEI_PCI_CFG_PPI_RW)(\r
IN EFI_PEI_SERVICES **PeiServices,\r
IN EFI_PEI_PCI_CFG_PPI *This,\r
IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
);\r
\r
/**\r
- The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI \r
+ The EFI_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI\r
controllers behind a PCI root bridge controller.\r
-\r
- @param Read\r
- PCI read services. See the Read() function description.\r
-\r
- @param Write\r
- PCI write services. See the Write() function description.\r
-\r
- @param Modify\r
- PCI read-modify-write services. See the Modify() function description.\r
-\r
**/\r
struct _EFI_PEI_PCI_CFG_PPI {\r
+ ///\r
+ /// PCI read services. See the Read() function description.\r
+ ///\r
EFI_PEI_PCI_CFG_PPI_IO Read;\r
+\r
+ ///\r
+ /// PCI write services. See the Write() function description.\r
+ ///\r
EFI_PEI_PCI_CFG_PPI_IO Write;\r
+\r
+ ///\r
+ /// PCI read-modify-write services. See the Modify() function description.\r
+ ///\r
EFI_PEI_PCI_CFG_PPI_RW Modify;\r
};\r
\r