IntelFsp2WrapperPkg: Support 64bit FspResetType for X64 build.

[mirror_edk2.git] / IntelFsp2WrapperPkg / FspWrapperNotifyDxe / FspWrapperNotifyDxe.c

diff --git a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
index 21385ac0b277489499df79dd881a4a52495922c3..7aa2c93e99638d5f34c22fde56a083a533d343ff 100644 (file)
--- a/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
+++ b/IntelFsp2WrapperPkg/FspWrapperNotifyDxe/FspWrapperNotifyDxe.c
@@ -97,7 +97,7 @@ OnPciEnumerationComplete (
   //\r
   if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {\r
     DEBUG ((DEBUG_INFO, "FSP NotifyPhase AfterPciEnumeration requested reset 0x%x\n", Status));\r
-    CallFspWrapperResetSystem ((UINT32)Status);\r
+    CallFspWrapperResetSystem (Status);\r
   }\r
 \r
   if (Status != EFI_SUCCESS) {\r
@@ -140,7 +140,7 @@ OnReadyToBoot (
   //\r
   if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {\r
     DEBUG ((DEBUG_INFO, "FSP NotifyPhase ReadyToBoot requested reset 0x%x\n", Status));\r
-    CallFspWrapperResetSystem ((UINT32)Status);\r
+    CallFspWrapperResetSystem (Status);\r
   }\r
 \r
   if (Status != EFI_SUCCESS) {\r
@@ -184,7 +184,7 @@ OnEndOfFirmware (
   //\r
   if ((Status >= FSP_STATUS_RESET_REQUIRED_COLD) && (Status <= FSP_STATUS_RESET_REQUIRED_8)) {\r
     DEBUG ((DEBUG_INFO, "FSP NotifyPhase EndOfFirmware requested reset 0x%x\n", Status));\r
-    CallFspWrapperResetSystem ((UINT32)Status);\r
+    CallFspWrapperResetSystem (Status);\r
   }\r
 \r
   if (Status != EFI_SUCCESS) {\r