IntelFsp2WrapperPkg: Adopt FSPM_UPD_COMMON_FSP24 for X64

[mirror_edk2.git] / IntelFsp2WrapperPkg / FspmWrapperPeim / FspmWrapperPeim.c

diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
index b0c6b2f8a67f0b6481bcfe08ce589eb0ba1705dc..047c2965a3dc8a8fd2d57d301e4215f4381563bd 100644 (file)
--- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
+++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c
@@ -3,7 +3,7 @@
   register TemporaryRamDonePpi to call TempRamExit API, and register MemoryDiscoveredPpi\r
   notify to call FspSiliconInit API.\r
 \r
-  Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
@@ -71,7 +71,7 @@ PeiFspMemoryInit (
   UINT64           TimeStampCounterStart;\r
   VOID             *FspHobListPtr;\r
   VOID             *HobData;\r
-  FSPM_UPD_COMMON  *FspmUpdDataPtr;\r
+  VOID             *FspmUpdDataPtr;\r
   UINTN            *SourceData;\r
 \r
   DEBUG ((DEBUG_INFO, "PeiFspMemoryInit enter\n"));\r
@@ -89,7 +89,7 @@ PeiFspMemoryInit (
     //\r
     // Copy default FSP-M UPD data from Flash\r
     //\r
-    FspmUpdDataPtr = (FSPM_UPD_COMMON *)AllocateZeroPool ((UINTN)FspmHeaderPtr->CfgRegionSize);\r
+    FspmUpdDataPtr = AllocateZeroPool ((UINTN)FspmHeaderPtr->CfgRegionSize);\r
     ASSERT (FspmUpdDataPtr != NULL);\r
     SourceData = (UINTN *)((UINTN)FspmHeaderPtr->ImageBase + (UINTN)FspmHeaderPtr->CfgRegionOffset);\r
     CopyMem (FspmUpdDataPtr, SourceData, (UINTN)FspmHeaderPtr->CfgRegionSize);\r
@@ -97,17 +97,24 @@ PeiFspMemoryInit (
     //\r
     // External UPD is ready, get the buffer from PCD pointer.\r
     //\r
-    FspmUpdDataPtr = (FSPM_UPD_COMMON *) GetFspmUpdDataAddress();\r
+    FspmUpdDataPtr = (VOID *) GetFspmUpdDataAddress();\r
     ASSERT (FspmUpdDataPtr != NULL);\r
   }\r
 \r
   DEBUG ((DEBUG_INFO, "UpdateFspmUpdData enter\n"));\r
-  UpdateFspmUpdData ((VOID *)FspmUpdDataPtr);\r
-  DEBUG ((DEBUG_INFO, "  NvsBufferPtr        - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.NvsBufferPtr));\r
-  DEBUG ((DEBUG_INFO, "  StackBase           - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.StackBase));\r
-  DEBUG ((DEBUG_INFO, "  StackSize           - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.StackSize));\r
-  DEBUG ((DEBUG_INFO, "  BootLoaderTolumSize - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.BootLoaderTolumSize));\r
-  DEBUG ((DEBUG_INFO, "  BootMode            - 0x%x\n", FspmUpdDataPtr->FspmArchUpd.BootMode));\r
+  UpdateFspmUpdData (FspmUpdDataPtr);\r
+  if (((FSPM_UPD_COMMON *)FspmUpdDataPtr)->FspmArchUpd.Revision >= 3) {\r
+    DEBUG ((DEBUG_INFO, "  StackBase           - 0x%lx\n", ((FSPM_UPD_COMMON_FSP24 *)FspmUpdDataPtr)->FspmArchUpd.StackBase));\r
+    DEBUG ((DEBUG_INFO, "  StackSize           - 0x%lx\n", ((FSPM_UPD_COMMON_FSP24 *)FspmUpdDataPtr)->FspmArchUpd.StackSize));\r
+    DEBUG ((DEBUG_INFO, "  BootLoaderTolumSize - 0x%x\n", ((FSPM_UPD_COMMON_FSP24 *)FspmUpdDataPtr)->FspmArchUpd.BootLoaderTolumSize));\r
+    DEBUG ((DEBUG_INFO, "  BootMode            - 0x%x\n", ((FSPM_UPD_COMMON_FSP24 *)FspmUpdDataPtr)->FspmArchUpd.BootMode));\r
+  } else {\r
+    DEBUG ((DEBUG_INFO, "  NvsBufferPtr        - 0x%x\n", ((FSPM_UPD_COMMON *)FspmUpdDataPtr)->FspmArchUpd.NvsBufferPtr));\r
+    DEBUG ((DEBUG_INFO, "  StackBase           - 0x%x\n", ((FSPM_UPD_COMMON *)FspmUpdDataPtr)->FspmArchUpd.StackBase));\r
+    DEBUG ((DEBUG_INFO, "  StackSize           - 0x%x\n", ((FSPM_UPD_COMMON *)FspmUpdDataPtr)->FspmArchUpd.StackSize));\r
+    DEBUG ((DEBUG_INFO, "  BootLoaderTolumSize - 0x%x\n", ((FSPM_UPD_COMMON *)FspmUpdDataPtr)->FspmArchUpd.BootLoaderTolumSize));\r
+    DEBUG ((DEBUG_INFO, "  BootMode            - 0x%x\n", ((FSPM_UPD_COMMON *)FspmUpdDataPtr)->FspmArchUpd.BootMode));\r
+  }\r
   DEBUG ((DEBUG_INFO, "  HobListPtr          - 0x%x\n", &FspHobListPtr));\r
 \r
   TimeStampCounterStart = AsmReadTsc ();\r