MdeModulePkg/PciSioSerial: Fix bad EOL

[mirror_edk2.git] / IntelFspPkg / FspSecCore / Ia32 / FspApiEntry.asm

diff --git a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
index a01b3c2d49c378453a52b1c61b6b8d2589b34e2d..71e3e5a1e2e92e73c3d8eb70da125ee78ed4a087 100644 (file)
--- a/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
+++ b/IntelFspPkg/FspSecCore/Ia32/FspApiEntry.asm
@@ -143,8 +143,8 @@ check_main_header:
    mov   ecx, MSR_IA32_PLATFORM_ID\r
    rdmsr\r
    mov   ecx, edx\r
-   shr   ecx, 50-32\r
-   and   ecx, 7h\r
+   shr   ecx, 50-32                          ; shift (50d-32d=18d=0x12) bits\r
+   and   ecx, 7h                             ; platform id at bit[52..50]\r
    mov   edx, 1\r
    shl   edx, cl\r
 \r
@@ -368,15 +368,15 @@ TempRamInitApi   PROC    NEAR    PUBLIC
   mov       eax, dword ptr [esp + 4]\r
   cmp       eax, 0\r
   mov       eax, 80000002h\r
-  jz        NemInitExit\r
+  jz        TempRamInitExit\r
 \r
   ;\r
   ; Sec Platform Init\r
   ;\r
   CALL_MMX  SecPlatformInit\r
   cmp       eax, 0\r
-  jnz       NemInitExit\r
-  \r
+  jnz       TempRamInitExit\r
+\r
   ; Load microcode\r
   LOAD_ESP\r
   CALL_MMX  LoadMicrocode\r
@@ -387,14 +387,14 @@ TempRamInitApi   PROC    NEAR    PUBLIC
   LOAD_ESP\r
   CALL_MMX  SecCarInit\r
   cmp       eax, 0\r
-  jnz       NemInitExit\r
+  jnz       TempRamInitExit\r
 \r
   LOAD_ESP\r
   CALL_MMX  EstablishStackFsp\r
 \r
   LXMMN      xmm6, eax, 3  ;Restore microcode status if no CAR init error from ECX-SLOT 3 in xmm6.\r
 \r
-NemInitExit:\r
+TempRamInitExit:\r
   ;\r
   ; Load EBP, EBX, ESI, EDI & ESP from XMM7 & XMM6\r
   ;\r
@@ -489,8 +489,8 @@ FspApiCommon   PROC C PUBLIC
   ; Verify the calling condition\r
   ;\r
   pushad\r
-  push   [esp + 4 * 8 + 4]\r
-  push   eax\r
+  push   [esp + 4 * 8 + 4]  ; push ApiParam\r
+  push   eax                ; push ApiIdx\r
   call   FspApiCallingCheck\r
   add    esp, 8\r
   cmp    eax, 0\r
@@ -569,7 +569,7 @@ FspApiCommon   PROC C PUBLIC
   ;\r
   ; Pass BFV into the PEI Core\r
   ; It uses relative address to calucate the actual boot FV base\r
-  ; For FSP impleantion with single FV, PcdFlashFvRecoveryBase and\r
+  ; For FSP implementation with single FV, PcdFspBootFirmwareVolumeBase and\r
   ; PcdFspAreaBaseAddress are the same. For FSP with mulitple FVs,\r
   ; they are different. The code below can handle both cases.\r
   ;\r