\r
DEBUG ((EFI_D_INFO, "\n"));\r
}\r
+\r
+/**\r
+ Dump the EHCI status registers\r
+\r
+ @param Ehc USB EHCI Host Controller instance\r
+\r
+**/\r
+VOID\r
+EhcDumpRegs (\r
+ IN USB2_HC_DEV *Ehc\r
+ )\r
+{\r
+ UINTN Index;\r
+\r
+ DEBUG ((EFI_D_INFO, " EHC_CAPLENGTH_OFFSET = 0x%08x\n", EhcReadCapRegister (Ehc, EHC_CAPLENGTH_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_HCSPARAMS_OFFSET = 0x%08x\n", EhcReadCapRegister (Ehc, EHC_HCSPARAMS_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_HCCPARAMS_OFFSET = 0x%08x\n", EhcReadCapRegister (Ehc, EHC_HCCPARAMS_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_USBCMD_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_USBCMD_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_USBSTS_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_USBSTS_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_USBINTR_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_USBINTR_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_FRINDEX_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_FRINDEX_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_CTRLDSSEG_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_CTRLDSSEG_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_FRAME_BASE_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_FRAME_BASE_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_ASYNC_HEAD_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_ASYNC_HEAD_OFFSET)));\r
+ DEBUG ((EFI_D_INFO, " EHC_CONFIG_FLAG_OFFSET = 0x%08x\n", EhcReadOpReg (Ehc, EHC_CONFIG_FLAG_OFFSET)));\r
+ for (Index = 0; Index < (UINT8) (Ehc->HcStructParams & HCSP_NPORTS); Index++) {\r
+ DEBUG ((EFI_D_INFO, " EHC_PORT_STAT_OFFSET(%d) = 0x%08x\n", Index, EhcReadOpReg (Ehc, EHC_PORT_STAT_OFFSET + (4 * Index))));\r
+ }\r
+}
\ No newline at end of file