This file contains the definination for host controller schedule routines.\r
\r
Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef _EFI_EHCI_SCHED_H_\r
#define _EFI_EHCI_SCHED_H_\r
\r
-\r
/**\r
Initialize the schedule data structure such as frame list.\r
\r
**/\r
EFI_STATUS\r
EhcInitSched (\r
- IN USB2_HC_DEV *Ehc\r
+ IN USB2_HC_DEV *Ehc\r
);\r
\r
-\r
/**\r
Free the schedule data. It may be partially initialized.\r
\r
**/\r
VOID\r
EhcFreeSched (\r
- IN USB2_HC_DEV *Ehc\r
+ IN USB2_HC_DEV *Ehc\r
);\r
\r
-\r
/**\r
Link the queue head to the asynchronous schedule list.\r
UEFI only supports one CTRL/BULK transfer at a time\r
**/\r
VOID\r
EhcLinkQhToAsync (\r
- IN USB2_HC_DEV *Ehc,\r
- IN EHC_QH *Qh\r
+ IN USB2_HC_DEV *Ehc,\r
+ IN EHC_QH *Qh\r
);\r
\r
-\r
/**\r
Unlink a queue head from the asynchronous schedule list.\r
Need to synchronize with hardware.\r
**/\r
VOID\r
EhcUnlinkQhFromAsync (\r
- IN USB2_HC_DEV *Ehc,\r
- IN EHC_QH *Qh\r
+ IN USB2_HC_DEV *Ehc,\r
+ IN EHC_QH *Qh\r
);\r
\r
-\r
/**\r
Link a queue head for interrupt transfer to the periodic\r
schedule frame list. This code is very much the same as\r
**/\r
VOID\r
EhcLinkQhToPeriod (\r
- IN USB2_HC_DEV *Ehc,\r
- IN EHC_QH *Qh\r
+ IN USB2_HC_DEV *Ehc,\r
+ IN EHC_QH *Qh\r
);\r
\r
-\r
/**\r
Unlink an interrupt queue head from the periodic\r
schedule frame list.\r
**/\r
VOID\r
EhcUnlinkQhFromPeriod (\r
- IN USB2_HC_DEV *Ehc,\r
- IN EHC_QH *Qh\r
+ IN USB2_HC_DEV *Ehc,\r
+ IN EHC_QH *Qh\r
);\r
\r
-\r
-\r
/**\r
Execute the transfer by polling the URB. This is a synchronous operation.\r
\r
**/\r
EFI_STATUS\r
EhcExecTransfer (\r
- IN USB2_HC_DEV *Ehc,\r
- IN URB *Urb,\r
- IN UINTN TimeOut\r
+ IN USB2_HC_DEV *Ehc,\r
+ IN URB *Urb,\r
+ IN UINTN TimeOut\r
);\r
\r
-\r
/**\r
Delete a single asynchronous interrupt transfer for\r
the device and endpoint.\r
**/\r
EFI_STATUS\r
EhciDelAsyncIntTransfer (\r
- IN USB2_HC_DEV *Ehc,\r
- IN UINT8 DevAddr,\r
- IN UINT8 EpNum,\r
- OUT UINT8 *DataToggle\r
+ IN USB2_HC_DEV *Ehc,\r
+ IN UINT8 DevAddr,\r
+ IN UINT8 EpNum,\r
+ OUT UINT8 *DataToggle\r
);\r
\r
-\r
/**\r
Remove all the asynchronous interrutp transfers.\r
\r
**/\r
VOID\r
EhciDelAllAsyncIntTransfers (\r
- IN USB2_HC_DEV *Ehc\r
+ IN USB2_HC_DEV *Ehc\r
);\r
\r
/**\r
**/\r
URB *\r
EhciInsertAsyncIntTransfer (\r
- IN USB2_HC_DEV *Ehc,\r
- IN UINT8 DevAddr,\r
- IN UINT8 EpAddr,\r
- IN UINT8 DevSpeed,\r
- IN UINT8 Toggle,\r
- IN UINTN MaxPacket,\r
- IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,\r
- IN UINTN DataLen,\r
- IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,\r
- IN VOID *Context,\r
- IN UINTN Interval\r
+ IN USB2_HC_DEV *Ehc,\r
+ IN UINT8 DevAddr,\r
+ IN UINT8 EpAddr,\r
+ IN UINT8 DevSpeed,\r
+ IN UINT8 Toggle,\r
+ IN UINTN MaxPacket,\r
+ IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Hub,\r
+ IN UINTN DataLen,\r
+ IN EFI_ASYNC_USB_TRANSFER_CALLBACK Callback,\r
+ IN VOID *Context,\r
+ IN UINTN Interval\r
);\r
\r
/**\r
VOID\r
EFIAPI\r
EhcMonitorAsyncRequests (\r
- IN EFI_EVENT Event,\r
- IN VOID *Context\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
);\r
\r
#endif\r