MdeModulePkg/SdMmcPciHcDxe: Add V3 64b DMA Support

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / NonDiscoverablePciDeviceDxe / NonDiscoverablePciDeviceIo.c

diff --git a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
index 1ffbdfa5f6d4a5105b5ccb266e0db01a2d525c07..2be8b36acc405d17354ab504aa2c20d6d88843c1 100644 (file)
--- a/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
+++ b/MdeModulePkg/Bus/Pci/NonDiscoverablePciDeviceDxe/NonDiscoverablePciDeviceIo.c
@@ -52,6 +52,10 @@ GetBarResource (
 \r
   BarIndex -= (UINT8)Dev->BarOffset;\r
 \r
+  if (BarIndex >= Dev->BarCount) {\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
   for (Desc = Dev->Device->Resources;\r
        Desc->Desc != ACPI_END_TAG_DESCRIPTOR;\r
        Desc = (VOID *)((UINT8 *)Desc + Desc->Len + 3)) {\r
@@ -465,6 +469,11 @@ PciIoPciRead (
   Address = (UINT8 *)&Dev->ConfigSpace + Offset;\r
   Length = Count << ((UINTN)Width & 0x3);\r
 \r
+  if (Offset >= sizeof (Dev->ConfigSpace)) {\r
+    ZeroMem (Buffer, Length);\r
+    return EFI_SUCCESS;\r
+  }\r
+\r
   if (Offset + Length > sizeof (Dev->ConfigSpace)) {\r
     //\r
     // Read all zeroes for config space accesses beyond the first\r
@@ -592,13 +601,26 @@ CoherentPciIoMap (
   EFI_STATUS                            Status;\r
   NON_DISCOVERABLE_PCI_DEVICE_MAP_INFO  *MapInfo;\r
 \r
+  if (Operation != EfiPciIoOperationBusMasterRead &&\r
+      Operation != EfiPciIoOperationBusMasterWrite &&\r
+      Operation != EfiPciIoOperationBusMasterCommonBuffer) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+\r
+  if (HostAddress   == NULL ||\r
+      NumberOfBytes == NULL ||\r
+      DeviceAddress == NULL ||\r
+      Mapping       == NULL) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+\r
   //\r
   // If HostAddress exceeds 4 GB, and this device does not support 64-bit DMA\r
   // addressing, we need to allocate a bounce buffer and copy over the data.\r
   //\r
   Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);\r
   if ((Dev->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0 &&\r
-      (UINTN)HostAddress + *NumberOfBytes > SIZE_4GB) {\r
+      (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress + *NumberOfBytes > SIZE_4GB) {\r
 \r
     //\r
     // Bounce buffering is not possible for consistent mappings\r
@@ -715,6 +737,11 @@ CoherentPciIoAllocateBuffer (
     return EFI_UNSUPPORTED;\r
   }\r
 \r
+  if ((MemoryType != EfiBootServicesData) &&\r
+      (MemoryType != EfiRuntimeServicesData)) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+\r
   //\r
   // Allocate below 4 GB if the dual address cycle attribute has not\r
   // been set. If the system has no memory available below 4 GB, there\r
@@ -872,6 +899,10 @@ NonCoherentPciIoAllocateBuffer (
   NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION *Alloc;\r
   VOID                                        *AllocAddress;\r
 \r
+  if (HostAddress == NULL) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+\r
   Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);\r
 \r
   Status = CoherentPciIoAllocateBuffer (This, Type, MemoryType, Pages,\r
@@ -990,6 +1021,19 @@ NonCoherentPciIoMap (
   EFI_GCD_MEMORY_SPACE_DESCRIPTOR       GcdDescriptor;\r
   BOOLEAN                               Bounce;\r
 \r
+  if (HostAddress   == NULL ||\r
+      NumberOfBytes == NULL ||\r
+      DeviceAddress == NULL ||\r
+      Mapping       == NULL) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+\r
+  if (Operation != EfiPciIoOperationBusMasterRead &&\r
+      Operation != EfiPciIoOperationBusMasterWrite &&\r
+      Operation != EfiPciIoOperationBusMasterCommonBuffer) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+\r
   MapInfo = AllocatePool (sizeof *MapInfo);\r
   if (MapInfo == NULL) {\r
     return EFI_OUT_OF_RESOURCES;\r
@@ -1006,7 +1050,7 @@ NonCoherentPciIoMap (
   // a bounce buffer and copy over the data in case HostAddress >= 4 GB.\r
   //\r
   Bounce = ((Dev->Attributes & EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE) == 0 &&\r
-            (UINTN)HostAddress + *NumberOfBytes > SIZE_4GB);\r
+            (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress + *NumberOfBytes > SIZE_4GB);\r
 \r
   if (!Bounce) {\r
     switch (Operation) {\r
@@ -1176,6 +1220,8 @@ PciIoGetLocation (
   OUT  UINTN                *FunctionNumber\r
   )\r
 {\r
+  NON_DISCOVERABLE_PCI_DEVICE         *Dev;\r
+\r
   if (SegmentNumber == NULL ||\r
       BusNumber == NULL ||\r
       DeviceNumber == NULL ||\r
@@ -1183,9 +1229,11 @@ PciIoGetLocation (
     return EFI_INVALID_PARAMETER;\r
   }\r
 \r
-  *SegmentNumber  = 0;\r
-  *BusNumber      = 0xff;\r
-  *DeviceNumber   = 0;\r
+  Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);\r
+\r
+  *SegmentNumber  = 0xff;\r
+  *BusNumber      = Dev->UniqueId >> 5;\r
+  *DeviceNumber   = Dev->UniqueId & 0x1f;\r
   *FunctionNumber = 0;\r
 \r
   return EFI_SUCCESS;\r
@@ -1223,8 +1271,15 @@ PciIoAttributes (
   NON_DISCOVERABLE_PCI_DEVICE   *Dev;\r
   BOOLEAN                       Enable;\r
 \r
+  #define DEV_SUPPORTED_ATTRIBUTES \\r
+    (EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
+\r
   Dev = NON_DISCOVERABLE_PCI_DEVICE_FROM_PCI_IO(This);\r
 \r
+  if ((Attributes & (~(DEV_SUPPORTED_ATTRIBUTES))) != 0) {\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+\r
   Enable = FALSE;\r
   switch (Operation) {\r
   case EfiPciIoAttributeOperationGet:\r
@@ -1238,7 +1293,7 @@ PciIoAttributes (
     if (Result == NULL) {\r
       return EFI_INVALID_PARAMETER;\r
     }\r
-    *Result = EFI_PCI_DEVICE_ENABLE | EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE;\r
+    *Result = DEV_SUPPORTED_ATTRIBUTES;\r
     break;\r
 \r
   case EfiPciIoAttributeOperationEnable:\r
@@ -1300,7 +1355,8 @@ PciIoGetBarAttributes (
   )\r
 {\r
   NON_DISCOVERABLE_PCI_DEVICE       *Dev;\r
-  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor, *BarDesc;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BarDesc;\r
   EFI_ACPI_END_TAG_DESCRIPTOR       *End;\r
   EFI_STATUS                        Status;\r
 \r