#ifndef __NON_DISCOVERABLE_PCI_DEVICE_IO_H__\r
#define __NON_DISCOVERABLE_PCI_DEVICE_IO_H__\r
\r
+#include <PiDxe.h>\r
+\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
\r
#include <Protocol/ComponentName.h>\r
#include <Protocol/NonDiscoverableDevice.h>\r
+#include <Protocol/Cpu.h>\r
#include <Protocol/PciIo.h>\r
\r
#define NON_DISCOVERABLE_PCI_DEVICE_SIG SIGNATURE_32 ('P', 'P', 'I', 'D')\r
\r
#define PCI_MAX_BARS 6\r
\r
+extern EFI_CPU_ARCH_PROTOCOL *mCpu;\r
+\r
+typedef struct {\r
+ //\r
+ // The linked-list next pointer\r
+ //\r
+ LIST_ENTRY List;\r
+ //\r
+ // The address of the uncached allocation\r
+ //\r
+ VOID *HostAddress;\r
+ //\r
+ // The number of pages in the allocation\r
+ //\r
+ UINTN NumPages;\r
+ //\r
+ // The attributes of the allocation\r
+ //\r
+ UINT64 Attributes;\r
+} NON_DISCOVERABLE_DEVICE_UNCACHED_ALLOCATION;\r
+\r
typedef struct {\r
UINT32 Signature;\r
//\r
// Whether this device has been enabled\r
//\r
BOOLEAN Enabled;\r
+ //\r
+ // Linked list to keep track of uncached allocations performed\r
+ // on behalf of this device\r
+ //\r
+ LIST_ENTRY UncachedAllocationList;\r
+ //\r
+ // Unique ID for this device instance: needed so that we can report unique\r
+ // segment/bus/device number for each device instance. Note that this number\r
+ // may change when disconnecting/reconnecting the driver.\r
+ //\r
+ UINTN UniqueId;\r
} NON_DISCOVERABLE_PCI_DEVICE;\r
\r
+/**\r
+ Initialize PciIo Protocol.\r
+\r
+ @param Device Point to NON_DISCOVERABLE_PCI_DEVICE instance.\r
+\r
+**/\r
VOID\r
InitializePciIoProtocol (\r
NON_DISCOVERABLE_PCI_DEVICE *Device\r