/** @file\r
Header files and data structures needed by PCI Bus module.\r
\r
-Copyright (c) 2006 - 2009, Intel Corporation\r
-All rights reserved. This program and the accompanying materials\r
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
UINT64 Length;\r
UINT64 Alignment;\r
PCI_BAR_TYPE BarType;\r
- BOOLEAN Prefetchable;\r
- UINT8 MemType;\r
- UINT8 Offset;\r
+ BOOLEAN BarTypeFixed;\r
+ UINT16 Offset;\r
};\r
\r
//\r
#define PCI_CARD_PREFETCHABLE_MEMORY_0_ENABLE BIT8\r
#define PCI_CARD_PREFETCHABLE_MEMORY_1_ENABLE BIT9\r
\r
+#define RB_IO_RANGE 1\r
+#define RB_MEM32_RANGE 2\r
+#define RB_PMEM32_RANGE 3\r
+#define RB_MEM64_RANGE 4\r
+#define RB_PMEM64_RANGE 5\r
+\r
#define PPB_BAR_0 0\r
#define PPB_BAR_1 1\r
#define PPB_IO_RANGE 2\r
LIST_ENTRY ChildList;\r
\r
//\r
- // TURE if the PCI bus driver creates the handle for this PCI device\r
+ // TRUE if the PCI bus driver creates the handle for this PCI device\r
//\r
BOOLEAN Registered;\r
\r
//\r
UINT32 Decodes;\r
\r
+ //\r
+ // TRUE if the ROM image is from the PCI Option ROM BAR\r
+ //\r
+ BOOLEAN EmbeddedRom;\r
+\r
//\r
// The OptionRom Size\r
//\r
EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *ResourcePaddingDescriptors;\r
EFI_HPC_PADDING_ATTRIBUTES PaddingAttributes;\r
\r
+ //\r
+ // Bus number ranges for a PCI Root Bridge device\r
+ //\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *BusNumberRanges;\r
+\r
BOOLEAN IsPciExp;\r
//\r
// For SR-IOV\r
UINT32 SystemPageSize;\r
UINT16 InitialVFs;\r
UINT16 ReservedBusNum;\r
+ //\r
+ // Per PCI to PCI Bridge spec, I/O window is 4K aligned,\r
+ // but some chipsets support non-standard I/O window alignments less than 4K.\r
+ // This field is used to support this case.\r
+ //\r
+ UINT16 BridgeIoAlignment;\r
};\r
\r
#define PCI_IO_DEVICE_FROM_PCI_IO_THIS(a) \\r
//\r
// Global Variables\r
//\r
-extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gEfiIncompatiblePciDeviceSupport;\r
+extern EFI_INCOMPATIBLE_PCI_DEVICE_SUPPORT_PROTOCOL *gIncompatiblePciDeviceSupport;\r
extern EFI_DRIVER_BINDING_PROTOCOL gPciBusDriverBinding;\r
extern EFI_COMPONENT_NAME_PROTOCOL gPciBusComponentName;\r
extern EFI_COMPONENT_NAME2_PROTOCOL gPciBusComponentName2;\r
extern UINT64 gAllZero;\r
extern EFI_PCI_PLATFORM_PROTOCOL *gPciPlatformProtocol;\r
extern EFI_PCI_OVERRIDE_PROTOCOL *gPciOverrideProtocol;\r
-\r
-\r
+extern BOOLEAN mReserveIsaAliases;\r
+extern BOOLEAN mReserveVgaAliases;\r
\r
/**\r
Macro that checks whether device is a GFX device.\r
\r
@param _p Specified device.\r
\r
- @retval TRUE Device is a a GFX device.\r
- @retval FALSE Device is not a a GFX device.\r
+ @retval TRUE Device is a GFX device.\r
+ @retval FALSE Device is not a GFX device.\r
\r
**/\r
#define IS_PCI_GFX(_p) IS_CLASS2 (_p, PCI_CLASS_DISPLAY, PCI_CLASS_DISPLAY_OTHER)\r
\r
@param This Protocol instance pointer.\r
@param Controller Handle of device to test.\r
- @param RemainingDevicePath Optional parameter use to pick a specific child.\r
+ @param RemainingDevicePath Optional parameter use to pick a specific child\r
device to start.\r
\r
@retval EFI_SUCCESS This driver supports this device.\r
\r
@param This Protocol instance pointer.\r
@param Controller Handle of device to bind driver to.\r
- @param RemainingDevicePath Optional parameter use to pick a specific child.\r
+ @param RemainingDevicePath Optional parameter use to pick a specific child\r
device to start.\r
\r
@retval EFI_SUCCESS This driver is added to ControllerHandle.\r
);\r
\r
/**\r
- Stop this driver on ControllerHandle. Support stoping any child handles\r
+ Stop this driver on ControllerHandle. Support stopping any child handles\r
created by this driver.\r
\r
@param This Protocol instance pointer.\r