**/\r
EFI_STATUS\r
PciOperateRegister (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 Command,\r
- IN UINT8 Offset,\r
- IN UINT8 Operation,\r
- OUT UINT16 *PtrCommand\r
+ IN PCI_IO_DEVICE *PciIoDevice,\r
+ IN UINT16 Command,\r
+ IN UINT8 Offset,\r
+ IN UINT8 Operation,\r
+ OUT UINT16 *PtrCommand\r
)\r
{\r
- UINT16 OldCommand;\r
- EFI_STATUS Status;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINT16 OldCommand;\r
+ EFI_STATUS Status;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
\r
- OldCommand = 0;\r
- PciIo = &PciIoDevice->PciIo;\r
+ OldCommand = 0;\r
+ PciIo = &PciIoDevice->PciIo;\r
\r
if (Operation != EFI_SET_REGISTER) {\r
Status = PciIo->Pci.Read (\r
}\r
\r
if (Operation == EFI_ENABLE_REGISTER) {\r
- OldCommand = (UINT16) (OldCommand | Command);\r
+ OldCommand = (UINT16)(OldCommand | Command);\r
} else if (Operation == EFI_DISABLE_REGISTER) {\r
- OldCommand = (UINT16) (OldCommand & ~(Command));\r
+ OldCommand = (UINT16)(OldCommand & ~(Command));\r
} else {\r
OldCommand = Command;\r
}\r
if (*Offset != 0) {\r
CapabilityPtr = *Offset;\r
} else {\r
-\r
CapabilityPtr = 0;\r
if (IS_CARDBUS_BRIDGE (&PciIoDevice->Pci)) {\r
-\r
PciIoDevice->PciIo.Pci.Read (\r
&PciIoDevice->PciIo,\r
EfiPciIoWidthUint8,\r
&CapabilityPtr\r
);\r
} else {\r
-\r
PciIoDevice->PciIo.Pci.Read (\r
&PciIoDevice->PciIo,\r
EfiPciIoWidthUint8,\r
&CapabilityEntry\r
);\r
\r
- CapabilityID = (UINT8) CapabilityEntry;\r
+ CapabilityID = (UINT8)CapabilityEntry;\r
\r
if (CapabilityID == CapId) {\r
*Offset = CapabilityPtr;\r
if (NextRegBlock != NULL) {\r
- *NextRegBlock = (UINT8) (CapabilityEntry >> 8);\r
+ *NextRegBlock = (UINT8)(CapabilityEntry >> 8);\r
}\r
\r
return EFI_SUCCESS;\r
// Certain PCI device may incorrectly have capability pointing to itself,\r
// break to avoid dead loop.\r
//\r
- if (CapabilityPtr == (UINT8) (CapabilityEntry >> 8)) {\r
+ if (CapabilityPtr == (UINT8)(CapabilityEntry >> 8)) {\r
break;\r
}\r
\r
- CapabilityPtr = (UINT8) (CapabilityEntry >> 8);\r
+ CapabilityPtr = (UINT8)(CapabilityEntry >> 8);\r
}\r
\r
return EFI_NOT_FOUND;\r
**/\r
EFI_STATUS\r
LocatePciExpressCapabilityRegBlock (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN UINT16 CapId,\r
- IN OUT UINT32 *Offset,\r
- OUT UINT32 *NextRegBlock OPTIONAL\r
+ IN PCI_IO_DEVICE *PciIoDevice,\r
+ IN UINT16 CapId,\r
+ IN OUT UINT32 *Offset,\r
+ OUT UINT32 *NextRegBlock OPTIONAL\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 CapabilityPtr;\r
- UINT32 CapabilityEntry;\r
- UINT16 CapabilityID;\r
+ EFI_STATUS Status;\r
+ UINT32 CapabilityPtr;\r
+ UINT32 CapabilityEntry;\r
+ UINT16 CapabilityID;\r
\r
//\r
// To check the capability of this device supports\r
// Mask it to DWORD alignment per PCI spec\r
//\r
CapabilityPtr &= 0xFFC;\r
- Status = PciIoDevice->PciIo.Pci.Read (\r
- &PciIoDevice->PciIo,\r
- EfiPciIoWidthUint32,\r
- CapabilityPtr,\r
- 1,\r
- &CapabilityEntry\r
- );\r
+ Status = PciIoDevice->PciIo.Pci.Read (\r
+ &PciIoDevice->PciIo,\r
+ EfiPciIoWidthUint32,\r
+ CapabilityPtr,\r
+ 1,\r
+ &CapabilityEntry\r
+ );\r
if (EFI_ERROR (Status)) {\r
break;\r
}\r
break;\r
}\r
\r
- CapabilityID = (UINT16) CapabilityEntry;\r
+ CapabilityID = (UINT16)CapabilityEntry;\r
\r
if (CapabilityID == CapId) {\r
*Offset = CapabilityPtr;\r