/** @file\r
EFI PCI IO protocol functions implementation for PCI Bus module.\r
\r
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
NULL\r
};\r
\r
-/**\r
- Report a error Status code of PCI bus driver controller.\r
-\r
- @param PciIoDevice Pci device instance.\r
- @param Code Status code value.\r
-\r
-**/\r
-EFI_STATUS\r
-ReportErrorStatusCode (\r
- IN PCI_IO_DEVICE *PciIoDevice,\r
- IN EFI_STATUS_CODE_VALUE Code\r
- )\r
-{\r
- return REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
- EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
- Code,\r
- PciIoDevice->DevicePath\r
- );\r
-}\r
-\r
/**\r
Initializes a PCI I/O Instance.\r
\r
IN UINT64 *Offset\r
)\r
{\r
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
{\r
UINT64 ExtendOffset;\r
\r
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (Width < 0 || Width > EfiPciIoWidthUint64) {\r
+ if ((UINT32)Width > EfiPciIoWidthUint64) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// \r
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
Count *= (UINTN)(1 << (Width & 0x03));\r
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
}\r
} \r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// \r
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
Count *= (UINTN)(1 << (Width & 0x03));\r
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
}\r
}\r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// \r
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
Count *= (UINTN)(1 << (Width & 0x03));\r
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
}\r
} \r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// \r
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
Count *= (UINTN)(1 << (Width & 0x03));\r
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
}\r
} \r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
// \r
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
Count *= (UINTN)(1 << (Width & 0x03));\r
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
}\r
} \r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_READ_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
// \r
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
if ((Offset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
Count *= (UINTN)(1 << (Width & 0x03));\r
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
}\r
} \r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_WRITE_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (Width < 0 || Width >= EfiPciIoWidthMaximum) {\r
+ if ((UINT32)Width >= EfiPciIoWidthMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
// \r
if (FeaturePcdGet (PcdUnalignedPciIoEnable)) {\r
if ((SrcOffset & ((1 << (Width & 0x03)) - 1)) != 0 || (DestOffset & ((1 << (Width & 0x03)) - 1)) != 0) {\r
- Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
Count *= (UINTN)(1 << (Width & 0x03));\r
+ Width = (EFI_PCI_IO_PROTOCOL_WIDTH) (Width & (~0x03));\r
}\r
} \r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
- if (Operation < 0 || Operation >= EfiPciIoOperationMaximum) {\r
+ if ((UINT32)Operation >= EfiPciIoOperationMaximum) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
);\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
PciIoDevice->PciRootBridgeIo\r
);\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r
return EFI_UNSUPPORTED;\r
}\r
\r
+ //\r
+ // Mask off attributes not supported by PCI root bridge.\r
+ //\r
+ Attributes &= ~(UINT64)(EFI_PCI_IO_ATTRIBUTE_EMBEDDED_DEVICE |\r
+ EFI_PCI_IO_ATTRIBUTE_EMBEDDED_ROM |\r
+ EFI_PCI_IO_ATTRIBUTE_DUAL_ADDRESS_CYCLE);\r
+\r
//\r
// Record the new attribute of the Root Bridge\r
//\r
);\r
}\r
\r
+ //\r
+ // Check VGA and VGA16, they can not be set at the same time\r
+ //\r
+ if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&\r
+ (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||\r
+ ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&\r
+ (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ||\r
+ ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
+ (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||\r
+ ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
+ (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ) {\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
//\r
// If no attributes can be supported, then return.\r
// Otherwise, set the attributes that it can support.\r
Command = 0;\r
BridgeControl = 0;\r
\r
- //\r
- // Check VGA and VGA16, they can not be set at the same time\r
- //\r
- if (((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&\r
- (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||\r
- ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO) != 0 &&\r
- (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ||\r
- ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
- (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_IO_16) != 0) ||\r
- ((Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO) != 0 &&\r
- (Attributes & EFI_PCI_IO_ATTRIBUTE_VGA_PALETTE_IO_16) != 0) ) {\r
- return EFI_UNSUPPORTED;\r
- }\r
-\r
//\r
// For PPB & P2C, set relevant attribute bits\r
//\r
}\r
\r
if (EFI_ERROR (Status)) {\r
- ReportErrorStatusCode (PciIoDevice, EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR);\r
+ REPORT_STATUS_CODE_WITH_DEVICE_PATH (\r
+ EFI_ERROR_CODE | EFI_ERROR_MINOR,\r
+ EFI_IO_BUS_PCI | EFI_IOB_EC_CONTROLLER_ERROR,\r
+ PciIoDevice->DevicePath\r
+ );\r
}\r
\r
return Status;\r