Refer to EMMC Electrical Standard Spec 5.1 Section 6.6 and SD Host Controller\r
Simplified Spec 3.0 Figure 3-3 for details.\r
\r
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
- @param[in] Slot The slot number of the SD card to send the command to.\r
- @param[in] Rca The relative device address to be assigned.\r
- @param[in] HsTiming The value to be written to HS_TIMING field of EXT_CSD register.\r
- @param[in] Timing The bus mode timing indicator.\r
- @param[in] ClockFreq The max clock frequency to be set, the unit is MHz.\r
+ @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
+ @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
+ @param[in] Slot The slot number of the SD card to send the command to.\r
+ @param[in] Rca The relative device address to be assigned.\r
+ @param[in] DriverStrength Driver strength to set for speed modes that support it.\r
+ @param[in] BusTiming The bus mode timing indicator.\r
+ @param[in] ClockFreq The max clock frequency to be set, the unit is MHz.\r
\r
@retval EFI_SUCCESS The operation is done correctly.\r
@retval Others The operation fails.\r
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
IN UINT8 Slot,\r
IN UINT16 Rca,\r
- IN UINT8 HsTiming,\r
- IN SD_MMC_BUS_MODE Timing,\r
+ IN EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength,\r
+ IN SD_MMC_BUS_MODE BusTiming,\r
IN UINT32 ClockFreq\r
)\r
{\r
//\r
Access = 0x03;\r
Index = OFFSET_OF (EMMC_EXT_CSD, HsTiming);\r
- Value = HsTiming;\r
CmdSet = 0;\r
+ switch (BusTiming) {\r
+ case SdMmcMmcHs400:\r
+ Value = (UINT8)((DriverStrength.Emmc << 4) | 3);\r
+ break;\r
+ case SdMmcMmcHs200:\r
+ Value = (UINT8)((DriverStrength.Emmc << 4) | 2);\r
+ break;\r
+ case SdMmcMmcHsSdr:\r
+ case SdMmcMmcHsDdr:\r
+ Value = 1;\r
+ break;\r
+ case SdMmcMmcLegacy:\r
+ Value = 0;\r
+ break;\r
+ default:\r
+ DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Unsupported BusTiming(%d\n)", BusTiming));\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
\r
Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Switch to hstiming %d fails with %r\n", HsTiming, Status));\r
+ DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Switch to bus timing %d fails with %r\n", BusTiming, Status));\r
return Status;\r
}\r
\r
Private->ControllerHandle,\r
Slot,\r
EdkiiSdMmcSwitchClockFreqPost,\r
- &Timing\r
+ &BusTiming\r
);\r
if (EFI_ERROR (Status)) {\r
DEBUG ((\r
@param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
@param[in] Slot The slot number of the SD card to send the command to.\r
@param[in] Rca The relative device address to be assigned.\r
- @param[in] ClockFreq The max clock frequency to be set.\r
- @param[in] IsDdr If TRUE, use dual data rate data simpling method. Otherwise\r
- use single data rate data simpling method.\r
- @param[in] BusWidth The bus width to be set, it could be 4 or 8.\r
+ @param[in] BusMode Pointer to SD_MMC_BUS_SETTINGS structure containing bus settings.\r
\r
@retval EFI_SUCCESS The operation is done correctly.\r
@retval Others The operation fails.\r
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
IN UINT8 Slot,\r
IN UINT16 Rca,\r
- IN UINT32 ClockFreq,\r
- IN BOOLEAN IsDdr,\r
- IN UINT8 BusWidth\r
+ IN SD_MMC_BUS_SETTINGS *BusMode\r
)\r
{\r
EFI_STATUS Status;\r
- UINT8 HsTiming;\r
UINT8 HostCtrl1;\r
- SD_MMC_BUS_MODE Timing;\r
SD_MMC_HC_PRIVATE_DATA *Private;\r
+ BOOLEAN IsDdr;\r
\r
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
\r
- Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusWidth);\r
+ if ((BusMode->BusTiming != SdMmcMmcHsSdr && BusMode->BusTiming != SdMmcMmcHsDdr) ||\r
+ BusMode->ClockFreq > 52) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ if (BusMode->BusTiming == SdMmcMmcHsDdr) {\r
+ IsDdr = TRUE;\r
+ } else {\r
+ IsDdr = FALSE;\r
+ }\r
+\r
+ Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusMode->BusWidth);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
- // Set to Hight Speed timing\r
+ // Set to High Speed timing\r
//\r
HostCtrl1 = BIT2;\r
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
return Status;\r
}\r
\r
- if (IsDdr) {\r
- Timing = SdMmcMmcHsDdr;\r
- } else if (ClockFreq == 52) {\r
- Timing = SdMmcMmcHsSdr;\r
- } else {\r
- Timing = SdMmcMmcLegacy;\r
- }\r
-\r
- Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, Timing);\r
+ Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, BusMode->BusTiming);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
- HsTiming = 1;\r
- Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
-\r
- return Status;\r
+ return EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);\r
}\r
\r
/**\r
- Switch to the HS200 timing according to request.\r
+ Switch to the HS200 timing. This function assumes that eMMC bus is still in legacy mode.\r
\r
Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
Simplified Spec 3.0 Figure 2-29 for details.\r
\r
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
- @param[in] Slot The slot number of the SD card to send the command to.\r
- @param[in] Rca The relative device address to be assigned.\r
- @param[in] ClockFreq The max clock frequency to be set.\r
- @param[in] BusWidth The bus width to be set, it could be 4 or 8.\r
+ @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
+ @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
+ @param[in] Slot The slot number of the SD card to send the command to.\r
+ @param[in] Rca The relative device address to be assigned.\r
+ @param[in] BusMode Pointer to SD_MMC_BUS_SETTINGS structure containing bus settings.\r
\r
@retval EFI_SUCCESS The operation is done correctly.\r
@retval Others The operation fails.\r
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
IN UINT8 Slot,\r
IN UINT16 Rca,\r
- IN UINT32 ClockFreq,\r
- IN UINT8 BusWidth\r
+ IN SD_MMC_BUS_SETTINGS *BusMode\r
)\r
{\r
EFI_STATUS Status;\r
- UINT8 HsTiming;\r
UINT16 ClockCtrl;\r
- SD_MMC_BUS_MODE Timing;\r
SD_MMC_HC_PRIVATE_DATA *Private;\r
\r
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
\r
- if ((BusWidth != 4) && (BusWidth != 8)) {\r
+ if (BusMode->BusTiming != SdMmcMmcHs200 ||\r
+ (BusMode->BusWidth != 4 && BusMode->BusWidth != 8)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, FALSE, BusWidth);\r
+ Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, FALSE, BusMode->BusWidth);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
//\r
- // Set to HS200/SDR104 timing\r
- //\r
- //\r
// Stop bus clock at first\r
//\r
Status = SdMmcHcStopClock (PciIo, Slot);\r
return Status;\r
}\r
\r
- Timing = SdMmcMmcHs200;\r
-\r
- Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, Timing);\r
+ Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, BusMode->BusTiming);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
ClockCtrl = BIT2;\r
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);\r
\r
- HsTiming = 2;\r
- Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
+ Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
- Status = EmmcTuningClkForHs200 (PciIo, PassThru, Slot, BusWidth);\r
+ Status = EmmcTuningClkForHs200 (PciIo, PassThru, Slot, BusMode->BusWidth);\r
\r
return Status;\r
}\r
\r
/**\r
- Switch to the HS400 timing according to request.\r
+ Switch to the HS400 timing. This function assumes that eMMC bus is still in legacy mode.\r
\r
Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
Simplified Spec 3.0 Figure 2-29 for details.\r
\r
- @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
- @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
- @param[in] Slot The slot number of the SD card to send the command to.\r
- @param[in] Rca The relative device address to be assigned.\r
- @param[in] ClockFreq The max clock frequency to be set.\r
+ @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
+ @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
+ @param[in] Slot The slot number of the SD card to send the command to.\r
+ @param[in] Rca The relative device address to be assigned.\r
+ @param[in] BusMode Pointer to SD_MMC_BUS_SETTINGS structure containing bus settings.\r
\r
@retval EFI_SUCCESS The operation is done correctly.\r
@retval Others The operation fails.\r
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
IN UINT8 Slot,\r
IN UINT16 Rca,\r
- IN UINT32 ClockFreq\r
+ IN SD_MMC_BUS_SETTINGS *BusMode\r
)\r
{\r
EFI_STATUS Status;\r
- UINT8 HsTiming;\r
- SD_MMC_BUS_MODE Timing;\r
SD_MMC_HC_PRIVATE_DATA *Private;\r
+ SD_MMC_BUS_SETTINGS Hs200BusMode;\r
+ UINT32 HsFreq;\r
+\r
+ if (BusMode->BusTiming != SdMmcMmcHs400 ||\r
+ BusMode->BusWidth != 8) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
\r
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
+ Hs200BusMode.BusTiming = SdMmcMmcHs200;\r
+ Hs200BusMode.BusWidth = BusMode->BusWidth;\r
+ Hs200BusMode.ClockFreq = BusMode->ClockFreq;\r
+ Hs200BusMode.DriverStrength = BusMode->DriverStrength;\r
\r
- Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, ClockFreq, 8);\r
+ Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, &Hs200BusMode);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
- // Set to Hight Speed timing and set the clock frequency to a value less than 52MHz.\r
+ // Set to High Speed timing and set the clock frequency to a value less than or equal to 52MHz.\r
+ // This step is necessary to be able to switch Bus into 8 bit DDR mode which is unsupported in HS200.\r
//\r
- HsTiming = 1;\r
- Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, SdMmcMmcHsSdr, 52);\r
+ Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, SdMmcMmcHsSdr);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- //\r
- // HS400 mode must use 8 data lines.\r
- //\r
- Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, TRUE, 8);\r
+\r
+ HsFreq = BusMode->ClockFreq < 52 ? BusMode->ClockFreq : 52;\r
+ Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, SdMmcMmcHsSdr, HsFreq);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
- Timing = SdMmcMmcHs400;\r
+ Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, TRUE, BusMode->BusWidth);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
\r
- Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, Timing);\r
+ Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, BusMode->BusTiming);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
- HsTiming = 3;\r
- Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
+ return EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);\r
+}\r
\r
- return Status;\r
+/**\r
+ Check if passed BusTiming is supported in both controller and card.\r
+\r
+ @param[in] Private Pointer to controller private data\r
+ @param[in] SlotIndex Index of the slot in the controller\r
+ @param[in] ExtCsd Pointer to the card's extended CSD\r
+ @param[in] BusTiming Bus timing to check\r
+\r
+ @retval TRUE Both card and controller support given BusTiming\r
+ @retval FALSE Card or controller doesn't support given BusTiming\r
+**/\r
+BOOLEAN\r
+EmmcIsBusTimingSupported (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 SlotIndex,\r
+ IN EMMC_EXT_CSD *ExtCsd,\r
+ IN SD_MMC_BUS_MODE BusTiming\r
+ )\r
+{\r
+ BOOLEAN Supported;\r
+ SD_MMC_HC_SLOT_CAP *Capabilities;\r
+\r
+ Capabilities = &Private->Capability[SlotIndex];\r
+\r
+ Supported = FALSE;\r
+ switch (BusTiming) {\r
+ case SdMmcMmcHs400:\r
+ if ((((ExtCsd->DeviceType & (BIT6 | BIT7)) != 0) && (Capabilities->Hs400 != 0)) && Capabilities->BusWidth8 != 0) {\r
+ Supported = TRUE;\r
+ }\r
+ break;\r
+ case SdMmcMmcHs200:\r
+ if ((((ExtCsd->DeviceType & (BIT4 | BIT5)) != 0) && (Capabilities->Sdr104 != 0))) {\r
+ Supported = TRUE;\r
+ }\r
+ break;\r
+ case SdMmcMmcHsDdr:\r
+ if ((((ExtCsd->DeviceType & (BIT2 | BIT3)) != 0) && (Capabilities->Ddr50 != 0))) {\r
+ Supported = TRUE;\r
+ }\r
+ break;\r
+ case SdMmcMmcHsSdr:\r
+ if ((((ExtCsd->DeviceType & BIT1) != 0) && (Capabilities->HighSpeed != 0))) {\r
+ Supported = TRUE;\r
+ }\r
+ break;\r
+ case SdMmcMmcLegacy:\r
+ if ((ExtCsd->DeviceType & BIT0) != 0) {\r
+ Supported = TRUE;\r
+ }\r
+ break;\r
+ default:\r
+ ASSERT (FALSE);\r
+ }\r
+\r
+ return Supported;\r
+}\r
+\r
+/**\r
+ Get the target bus timing to set on the link. This function\r
+ will try to select highest bus timing supported by card, controller\r
+ and the driver.\r
+\r
+ @param[in] Private Pointer to controller private data\r
+ @param[in] SlotIndex Index of the slot in the controller\r
+ @param[in] ExtCsd Pointer to the card's extended CSD\r
+\r
+ @return Bus timing value that should be set on link\r
+**/\r
+SD_MMC_BUS_MODE\r
+EmmcGetTargetBusTiming (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 SlotIndex,\r
+ IN EMMC_EXT_CSD *ExtCsd\r
+ )\r
+{\r
+ SD_MMC_BUS_MODE BusTiming;\r
+\r
+ //\r
+ // We start with highest bus timing that this driver currently supports and\r
+ // return as soon as we find supported timing.\r
+ //\r
+ BusTiming = SdMmcMmcHs400;\r
+ while (BusTiming > SdMmcMmcLegacy) {\r
+ if (EmmcIsBusTimingSupported (Private, SlotIndex, ExtCsd, BusTiming)) {\r
+ break;\r
+ }\r
+ BusTiming--;\r
+ }\r
+\r
+ return BusTiming;\r
+}\r
+\r
+/**\r
+ Check if the passed bus width is supported by controller and card.\r
+\r
+ @param[in] Private Pointer to controller private data\r
+ @param[in] SlotIndex Index of the slot in the controller\r
+ @param[in] BusTiming Bus timing set on the link\r
+ @param[in] BusWidth Bus width to check\r
+\r
+ @retval TRUE Passed bus width is supported in current bus configuration\r
+ @retval FALSE Passed bus width is not supported in current bus configuration\r
+**/\r
+BOOLEAN\r
+EmmcIsBusWidthSupported (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 SlotIndex,\r
+ IN SD_MMC_BUS_MODE BusTiming,\r
+ IN UINT16 BusWidth\r
+ )\r
+{\r
+ if (BusWidth == 8 && Private->Capability[SlotIndex].BusWidth8 != 0) {\r
+ return TRUE;\r
+ } else if (BusWidth == 4 && BusTiming != SdMmcMmcHs400) {\r
+ return TRUE;\r
+ } else if (BusWidth == 1 && (BusTiming == SdMmcMmcHsSdr || BusTiming == SdMmcMmcLegacy)) {\r
+ return TRUE;\r
+ }\r
+\r
+ return FALSE;\r
+}\r
+\r
+/**\r
+ Get the target bus width to be set on the bus.\r
+\r
+ @param[in] Private Pointer to controller private data\r
+ @param[in] SlotIndex Index of the slot in the controller\r
+ @param[in] ExtCsd Pointer to card's extended CSD\r
+ @param[in] BusTiming Bus timing set on the bus\r
+\r
+ @return Bus width to be set on the bus\r
+**/\r
+UINT8\r
+EmmcGetTargetBusWidth (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 SlotIndex,\r
+ IN EMMC_EXT_CSD *ExtCsd,\r
+ IN SD_MMC_BUS_MODE BusTiming\r
+ )\r
+{\r
+ UINT8 BusWidth;\r
+ UINT8 PreferredBusWidth;\r
+\r
+ PreferredBusWidth = Private->Slot[SlotIndex].OperatingParameters.BusWidth;\r
+\r
+ if (PreferredBusWidth != EDKII_SD_MMC_BUS_WIDTH_IGNORE &&\r
+ EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, PreferredBusWidth)) {\r
+ BusWidth = PreferredBusWidth;\r
+ } else if (EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, 8)) {\r
+ BusWidth = 8;\r
+ } else if (EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, 4)) {\r
+ BusWidth = 4;\r
+ } else {\r
+ BusWidth = 1;\r
+ }\r
+\r
+ return BusWidth;\r
+}\r
+\r
+/**\r
+ Get the target clock frequency to be set on the bus.\r
+\r
+ @param[in] Private Pointer to controller private data\r
+ @param[in] SlotIndex Index of the slot in the controller\r
+ @param[in] ExtCsd Pointer to card's extended CSD\r
+ @param[in] BusTiming Bus timing to be set on the bus\r
+\r
+ @return Value of the clock frequency to be set on bus in MHz\r
+**/\r
+UINT32\r
+EmmcGetTargetClockFreq (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 SlotIndex,\r
+ IN EMMC_EXT_CSD *ExtCsd,\r
+ IN SD_MMC_BUS_MODE BusTiming\r
+ )\r
+{\r
+ UINT32 PreferredClockFreq;\r
+ UINT32 MaxClockFreq;\r
+\r
+ PreferredClockFreq = Private->Slot[SlotIndex].OperatingParameters.ClockFreq;\r
+\r
+ switch (BusTiming) {\r
+ case SdMmcMmcHs400:\r
+ case SdMmcMmcHs200:\r
+ MaxClockFreq = 200;\r
+ break;\r
+ case SdMmcMmcHsSdr:\r
+ case SdMmcMmcHsDdr:\r
+ MaxClockFreq = 52;\r
+ break;\r
+ default:\r
+ MaxClockFreq = 26;\r
+ break;\r
+ }\r
+\r
+ if (PreferredClockFreq != EDKII_SD_MMC_CLOCK_FREQ_IGNORE && PreferredClockFreq < MaxClockFreq) {\r
+ return PreferredClockFreq;\r
+ } else {\r
+ return MaxClockFreq;\r
+ }\r
+}\r
+\r
+/**\r
+ Get the driver strength to be set on bus.\r
+\r
+ @param[in] Private Pointer to controller private data\r
+ @param[in] SlotIndex Index of the slot in the controller\r
+ @param[in] ExtCsd Pointer to card's extended CSD\r
+ @param[in] BusTiming Bus timing set on the bus\r
+\r
+ @return Value of the driver strength to be set on the bus\r
+**/\r
+EDKII_SD_MMC_DRIVER_STRENGTH\r
+EmmcGetTargetDriverStrength (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 SlotIndex,\r
+ IN EMMC_EXT_CSD *ExtCsd,\r
+ IN SD_MMC_BUS_MODE BusTiming\r
+ )\r
+{\r
+ EDKII_SD_MMC_DRIVER_STRENGTH PreferredDriverStrength;\r
+ EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;\r
+\r
+ PreferredDriverStrength = Private->Slot[SlotIndex].OperatingParameters.DriverStrength;\r
+ DriverStrength.Emmc = EmmcDriverStrengthType0;\r
+\r
+ if (PreferredDriverStrength.Emmc != EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE &&\r
+ (ExtCsd->DriverStrength & (BIT0 << PreferredDriverStrength.Emmc))) {\r
+ DriverStrength.Emmc = PreferredDriverStrength.Emmc;\r
+ }\r
+\r
+ return DriverStrength;\r
+}\r
+\r
+/**\r
+ Get the target settings for the bus mode.\r
+\r
+ @param[in] Private Pointer to controller private data\r
+ @param[in] SlotIndex Index of the slot in the controller\r
+ @param[in] ExtCsd Pointer to card's extended CSD\r
+ @param[out] BusMode Target configuration of the bus\r
+**/\r
+VOID\r
+EmmcGetTargetBusMode (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 SlotIndex,\r
+ IN EMMC_EXT_CSD *ExtCsd,\r
+ OUT SD_MMC_BUS_SETTINGS *BusMode\r
+ )\r
+{\r
+ BusMode->BusTiming = EmmcGetTargetBusTiming (Private, SlotIndex, ExtCsd);\r
+ BusMode->BusWidth = EmmcGetTargetBusWidth (Private, SlotIndex, ExtCsd, BusMode->BusTiming);\r
+ BusMode->ClockFreq = EmmcGetTargetClockFreq (Private, SlotIndex, ExtCsd, BusMode->BusTiming);\r
+ BusMode->DriverStrength = EmmcGetTargetDriverStrength (Private, SlotIndex, ExtCsd, BusMode->BusTiming);\r
}\r
\r
/**\r
EFI_STATUS Status;\r
EMMC_CSD Csd;\r
EMMC_EXT_CSD ExtCsd;\r
- UINT8 HsTiming;\r
- BOOLEAN IsDdr;\r
- UINT32 ClockFreq;\r
- UINT8 BusWidth;\r
+ SD_MMC_BUS_SETTINGS BusMode;\r
SD_MMC_HC_PRIVATE_DATA *Private;\r
\r
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
}\r
\r
ASSERT (Private->BaseClkFreq[Slot] != 0);\r
+\r
//\r
- // Check if the Host Controller support 8bits bus width.\r
- //\r
- if (Private->Capability[Slot].BusWidth8 != 0) {\r
- BusWidth = 8;\r
- } else {\r
- BusWidth = 4;\r
- }\r
- //\r
- // Get Deivce_Type from EXT_CSD register.\r
+ // Get Device_Type from EXT_CSD register.\r
//\r
Status = EmmcGetExtCsd (PassThru, Slot, &ExtCsd);\r
if (EFI_ERROR (Status)) {\r
DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: GetExtCsd fails with %r\n", Status));\r
return Status;\r
}\r
- //\r
- // Calculate supported bus speed/bus width/clock frequency.\r
- //\r
- HsTiming = 0;\r
- IsDdr = FALSE;\r
- ClockFreq = 0;\r
- if (((ExtCsd.DeviceType & (BIT4 | BIT5)) != 0) && (Private->Capability[Slot].Sdr104 != 0)) {\r
- HsTiming = 2;\r
- IsDdr = FALSE;\r
- ClockFreq = 200;\r
- } else if (((ExtCsd.DeviceType & (BIT2 | BIT3)) != 0) && (Private->Capability[Slot].Ddr50 != 0)) {\r
- HsTiming = 1;\r
- IsDdr = TRUE;\r
- ClockFreq = 52;\r
- } else if (((ExtCsd.DeviceType & BIT1) != 0) && (Private->Capability[Slot].HighSpeed != 0)) {\r
- HsTiming = 1;\r
- IsDdr = FALSE;\r
- ClockFreq = 52;\r
- } else if (((ExtCsd.DeviceType & BIT0) != 0) && (Private->Capability[Slot].HighSpeed != 0)) {\r
- HsTiming = 1;\r
- IsDdr = FALSE;\r
- ClockFreq = 26;\r
- }\r
- //\r
- // Check if both of the device and the host controller support HS400 DDR mode.\r
- //\r
- if (((ExtCsd.DeviceType & (BIT6 | BIT7)) != 0) && (Private->Capability[Slot].Hs400 != 0)) {\r
- //\r
- // The host controller supports 8bits bus.\r
- //\r
- ASSERT (BusWidth == 8);\r
- HsTiming = 3;\r
- IsDdr = TRUE;\r
- ClockFreq = 200;\r
- }\r
\r
- if ((ClockFreq == 0) || (HsTiming == 0)) {\r
- //\r
- // Continue using default setting.\r
- //\r
- return EFI_SUCCESS;\r
- }\r
+ EmmcGetTargetBusMode (Private, Slot, &ExtCsd, &BusMode);\r
\r
- DEBUG ((DEBUG_INFO, "EmmcSetBusMode: HsTiming %d ClockFreq %d BusWidth %d Ddr %a\n", HsTiming, ClockFreq, BusWidth, IsDdr ? "TRUE":"FALSE"));\r
+ DEBUG ((DEBUG_INFO, "EmmcSetBusMode: Target bus mode: timing = %d, width = %d, clock freq = %d, driver strength = %d\n",\r
+ BusMode.BusTiming, BusMode.BusWidth, BusMode.ClockFreq, BusMode.DriverStrength.Emmc));\r
\r
- if (HsTiming == 3) {\r
- //\r
- // Execute HS400 timing switch procedure\r
- //\r
- Status = EmmcSwitchToHS400 (PciIo, PassThru, Slot, Rca, ClockFreq);\r
- } else if (HsTiming == 2) {\r
- //\r
- // Execute HS200 timing switch procedure\r
- //\r
- Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, ClockFreq, BusWidth);\r
+ if (BusMode.BusTiming == SdMmcMmcHs400) {\r
+ Status = EmmcSwitchToHS400 (PciIo, PassThru, Slot, Rca, &BusMode);\r
+ } else if (BusMode.BusTiming == SdMmcMmcHs200) {\r
+ Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, &BusMode);\r
} else {\r
- //\r
- // Execute High Speed timing switch procedure\r
- //\r
- Status = EmmcSwitchToHighSpeed (PciIo, PassThru, Slot, Rca, ClockFreq, IsDdr, BusWidth);\r
+ Status = EmmcSwitchToHighSpeed (PciIo, PassThru, Slot, Rca, &BusMode);\r
}\r
\r
- DEBUG ((DEBUG_INFO, "EmmcSetBusMode: Switch to %a %r\n", (HsTiming == 3) ? "HS400" : ((HsTiming == 2) ? "HS200" : "HighSpeed"), Status));\r
+ DEBUG ((DEBUG_INFO, "EmmcSetBusMode: Switch to %a %r\n", (BusMode.BusTiming == SdMmcMmcHs400) ? "HS400" : ((BusMode.BusTiming == SdMmcMmcHs200) ? "HS200" : "HighSpeed"), Status));\r
\r
return Status;\r
}\r
projects / mirror_edk2.git / blobdiff