Provides some data structure definitions used by the SD/MMC host controller driver.\r
\r
Copyright (c) 2018-2019, NVIDIA CORPORATION. All rights reserved.\r
-Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2015 - 2020, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/UefiLib.h>\r
#include <Library/DevicePathLib.h>\r
+#include <Library/PcdLib.h>\r
\r
#include <Protocol/DevicePath.h>\r
#include <Protocol/PciIo.h>\r
\r
#include "SdMmcPciHci.h"\r
\r
-extern EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName;\r
-extern EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2;\r
-extern EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding;\r
+extern EFI_COMPONENT_NAME_PROTOCOL gSdMmcPciHcComponentName;\r
+extern EFI_COMPONENT_NAME2_PROTOCOL gSdMmcPciHcComponentName2;\r
+extern EFI_DRIVER_BINDING_PROTOCOL gSdMmcPciHcDriverBinding;\r
\r
-extern EDKII_SD_MMC_OVERRIDE *mOverride;\r
+extern EDKII_SD_MMC_OVERRIDE *mOverride;\r
\r
#define SD_MMC_HC_PRIVATE_SIGNATURE SIGNATURE_32 ('s', 'd', 't', 'f')\r
\r
//\r
// Generic time out value, 1 microsecond as unit.\r
//\r
-#define SD_MMC_HC_GENERIC_TIMEOUT 1 * 1000 * 1000\r
+#define SD_MMC_HC_GENERIC_TIMEOUT (PcdGet32 (PcdSdMmcGenericTimeoutValue))\r
\r
//\r
// SD/MMC async transfer timer interval, set by experience.\r
// The unit is 100us, takes 1ms as interval.\r
//\r
-#define SD_MMC_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS(1)\r
+#define SD_MMC_HC_ASYNC_TIMER EFI_TIMER_PERIOD_MILLISECONDS(1)\r
//\r
// SD/MMC removable device enumeration timer interval, set by experience.\r
// The unit is 100us, takes 100ms as interval.\r
//\r
-#define SD_MMC_HC_ENUM_TIMER EFI_TIMER_PERIOD_MILLISECONDS(100)\r
+#define SD_MMC_HC_ENUM_TIMER EFI_TIMER_PERIOD_MILLISECONDS(100)\r
\r
typedef enum {\r
UnknownCardType,\r
} EFI_SD_MMC_SLOT_TYPE;\r
\r
typedef struct {\r
- BOOLEAN Enable;\r
- EFI_SD_MMC_SLOT_TYPE SlotType;\r
- BOOLEAN MediaPresent;\r
- BOOLEAN Initialized;\r
- SD_MMC_CARD_TYPE CardType;\r
+ BOOLEAN Enable;\r
+ EFI_SD_MMC_SLOT_TYPE SlotType;\r
+ BOOLEAN MediaPresent;\r
+ BOOLEAN Initialized;\r
+ SD_MMC_CARD_TYPE CardType;\r
+ UINT64 CurrentFreq;\r
+ EDKII_SD_MMC_OPERATING_PARAMETERS OperatingParameters;\r
} SD_MMC_HC_SLOT;\r
\r
typedef struct {\r
- UINTN Signature;\r
+ UINTN Signature;\r
\r
- EFI_HANDLE ControllerHandle;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
+ EFI_HANDLE ControllerHandle;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
\r
- EFI_SD_MMC_PASS_THRU_PROTOCOL PassThru;\r
+ EFI_SD_MMC_PASS_THRU_PROTOCOL PassThru;\r
\r
- UINT64 PciAttributes;\r
+ UINT64 PciAttributes;\r
//\r
// The field is used to record the previous slot in GetNextSlot().\r
//\r
- UINT8 PreviousSlot;\r
+ UINT8 PreviousSlot;\r
//\r
// For Non-blocking operation.\r
//\r
- EFI_EVENT TimerEvent;\r
+ EFI_EVENT TimerEvent;\r
//\r
// For Sd removable device enumeration.\r
//\r
- EFI_EVENT ConnectEvent;\r
- LIST_ENTRY Queue;\r
+ EFI_EVENT ConnectEvent;\r
+ LIST_ENTRY Queue;\r
\r
- SD_MMC_HC_SLOT Slot[SD_MMC_HC_MAX_SLOT];\r
- SD_MMC_HC_SLOT_CAP Capability[SD_MMC_HC_MAX_SLOT];\r
- UINT64 MaxCurrent[SD_MMC_HC_MAX_SLOT];\r
- UINT16 ControllerVersion[SD_MMC_HC_MAX_SLOT];\r
+ SD_MMC_HC_SLOT Slot[SD_MMC_HC_MAX_SLOT];\r
+ SD_MMC_HC_SLOT_CAP Capability[SD_MMC_HC_MAX_SLOT];\r
+ UINT64 MaxCurrent[SD_MMC_HC_MAX_SLOT];\r
+ UINT16 ControllerVersion[SD_MMC_HC_MAX_SLOT];\r
\r
//\r
// Some controllers may require to override base clock frequency\r
// value stored in Capabilities Register 1.\r
//\r
- UINT32 BaseClkFreq[SD_MMC_HC_MAX_SLOT];\r
+ UINT32 BaseClkFreq[SD_MMC_HC_MAX_SLOT];\r
} SD_MMC_HC_PRIVATE_DATA;\r
\r
-#define SD_MMC_HC_TRB_SIG SIGNATURE_32 ('T', 'R', 'B', 'T')\r
+typedef struct {\r
+ SD_MMC_BUS_MODE BusTiming;\r
+ UINT8 BusWidth;\r
+ UINT32 ClockFreq;\r
+ EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;\r
+} SD_MMC_BUS_SETTINGS;\r
+\r
+#define SD_MMC_HC_TRB_SIG SIGNATURE_32 ('T', 'R', 'B', 'T')\r
+\r
+#define SD_MMC_TRB_RETRIES 5\r
\r
//\r
// TRB (Transfer Request Block) contains information for the cmd request.\r
//\r
typedef struct {\r
- UINT32 Signature;\r
- LIST_ENTRY TrbList;\r
-\r
- UINT8 Slot;\r
- UINT16 BlockSize;\r
-\r
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;\r
- VOID *Data;\r
- UINT32 DataLen;\r
- BOOLEAN Read;\r
- EFI_PHYSICAL_ADDRESS DataPhy;\r
- VOID *DataMap;\r
- SD_MMC_HC_TRANSFER_MODE Mode;\r
- SD_MMC_HC_ADMA_LENGTH_MODE AdmaLengthMode;\r
-\r
- EFI_EVENT Event;\r
- BOOLEAN Started;\r
- UINT64 Timeout;\r
-\r
- SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc;\r
- SD_MMC_HC_ADMA_64_V3_DESC_LINE *Adma64V3Desc;\r
- SD_MMC_HC_ADMA_64_V4_DESC_LINE *Adma64V4Desc;\r
- EFI_PHYSICAL_ADDRESS AdmaDescPhy;\r
- VOID *AdmaMap;\r
- UINT32 AdmaPages;\r
-\r
- SD_MMC_HC_PRIVATE_DATA *Private;\r
+ UINT32 Signature;\r
+ LIST_ENTRY TrbList;\r
+\r
+ UINT8 Slot;\r
+ UINT16 BlockSize;\r
+\r
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;\r
+ VOID *Data;\r
+ UINT32 DataLen;\r
+ BOOLEAN Read;\r
+ EFI_PHYSICAL_ADDRESS DataPhy;\r
+ VOID *DataMap;\r
+ SD_MMC_HC_TRANSFER_MODE Mode;\r
+ SD_MMC_HC_ADMA_LENGTH_MODE AdmaLengthMode;\r
+\r
+ EFI_EVENT Event;\r
+ BOOLEAN Started;\r
+ BOOLEAN CommandComplete;\r
+ UINT64 Timeout;\r
+ UINT32 Retries;\r
+\r
+ BOOLEAN PioModeTransferCompleted;\r
+ UINT32 PioBlockIndex;\r
+\r
+ SD_MMC_HC_ADMA_32_DESC_LINE *Adma32Desc;\r
+ SD_MMC_HC_ADMA_64_V3_DESC_LINE *Adma64V3Desc;\r
+ SD_MMC_HC_ADMA_64_V4_DESC_LINE *Adma64V4Desc;\r
+ EFI_PHYSICAL_ADDRESS AdmaDescPhy;\r
+ VOID *AdmaMap;\r
+ UINT32 AdmaPages;\r
+\r
+ SD_MMC_HC_PRIVATE_DATA *Private;\r
} SD_MMC_HC_TRB;\r
\r
#define SD_MMC_HC_TRB_FROM_THIS(a) \\r
// Task for Non-blocking mode.\r
//\r
typedef struct {\r
- UINT32 Signature;\r
- LIST_ENTRY Link;\r
-\r
- UINT8 Slot;\r
- EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;\r
- BOOLEAN IsStart;\r
- EFI_EVENT Event;\r
- UINT64 RetryTimes;\r
- BOOLEAN InfiniteWait;\r
- VOID *Map;\r
- VOID *MapAddress;\r
+ UINT32 Signature;\r
+ LIST_ENTRY Link;\r
+\r
+ UINT8 Slot;\r
+ EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet;\r
+ BOOLEAN IsStart;\r
+ EFI_EVENT Event;\r
+ UINT64 RetryTimes;\r
+ BOOLEAN InfiniteWait;\r
+ VOID *Map;\r
+ VOID *MapAddress;\r
} SD_MMC_HC_QUEUE;\r
\r
//\r
// Prototypes\r
//\r
+\r
/**\r
Execute card identification procedure.\r
\r
typedef\r
EFI_STATUS\r
(*CARD_TYPE_DETECT_ROUTINE) (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN UINT8 Slot\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SdMmcPassThruPassThru (\r
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
- IN UINT8 Slot,\r
- IN OUT EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,\r
- IN EFI_EVENT Event OPTIONAL\r
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
+ IN UINT8 Slot,\r
+ IN OUT EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,\r
+ IN EFI_EVENT Event OPTIONAL\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SdMmcPassThruGetNextSlot (\r
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
- IN OUT UINT8 *Slot\r
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
+ IN OUT UINT8 *Slot\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SdMmcPassThruBuildDevicePath (\r
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
- IN UINT8 Slot,\r
- IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath\r
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
+ IN UINT8 Slot,\r
+ IN OUT EFI_DEVICE_PATH_PROTOCOL **DevicePath\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SdMmcPassThruGetSlotNumber (\r
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
- IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,\r
- OUT UINT8 *Slot\r
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,\r
+ OUT UINT8 *Slot\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SdMmcPassThruResetDevice (\r
- IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
- IN UINT8 Slot\r
+ IN EFI_SD_MMC_PASS_THRU_PROTOCOL *This,\r
+ IN UINT8 Slot\r
);\r
\r
//\r
// Driver model protocol interfaces\r
//\r
+\r
/**\r
Tests to see if this driver supports a given controller. If a child device is provided,\r
it further tests to see if this driver supports creating a handle for the specified child device.\r
EFI_STATUS\r
EFIAPI\r
SdMmcPciHcDriverBindingSupported (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SdMmcPciHcDriverBindingStart (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SdMmcPciHcDriverBindingStop (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN UINTN NumberOfChildren,\r
- IN EFI_HANDLE *ChildHandleBuffer\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN UINTN NumberOfChildren,\r
+ IN EFI_HANDLE *ChildHandleBuffer\r
);\r
\r
//\r
// EFI Component Name Functions\r
//\r
+\r
/**\r
Retrieves a Unicode string that is the user readable name of the driver.\r
\r
EFI_STATUS\r
EFIAPI\r
SdMmcPciHcComponentNameGetDriverName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **DriverName\r
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
+ IN CHAR8 *Language,\r
+ OUT CHAR16 **DriverName\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
SdMmcPciHcComponentNameGetControllerName (\r
- IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
- IN EFI_HANDLE ControllerHandle,\r
- IN EFI_HANDLE ChildHandle, OPTIONAL\r
- IN CHAR8 *Language,\r
- OUT CHAR16 **ControllerName\r
+ IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
+ IN EFI_HANDLE ControllerHandle,\r
+ IN EFI_HANDLE ChildHandle OPTIONAL,\r
+ IN CHAR8 *Language,\r
+ OUT CHAR16 **ControllerName\r
);\r
\r
/**\r
**/\r
SD_MMC_HC_TRB *\r
SdMmcCreateTrb (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN UINT8 Slot,\r
- IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,\r
- IN EFI_EVENT Event\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot,\r
+ IN EFI_SD_MMC_PASS_THRU_COMMAND_PACKET *Packet,\r
+ IN EFI_EVENT Event\r
);\r
\r
/**\r
**/\r
VOID\r
SdMmcFreeTrb (\r
- IN SD_MMC_HC_TRB *Trb\r
+ IN SD_MMC_HC_TRB *Trb\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
SdMmcCheckTrbEnv (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN SD_MMC_HC_TRB *Trb\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN SD_MMC_HC_TRB *Trb\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
SdMmcWaitTrbEnv (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN SD_MMC_HC_TRB *Trb\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN SD_MMC_HC_TRB *Trb\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
SdMmcExecTrb (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN SD_MMC_HC_TRB *Trb\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN SD_MMC_HC_TRB *Trb\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
SdMmcCheckTrbResult (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN SD_MMC_HC_TRB *Trb\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN SD_MMC_HC_TRB *Trb\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
SdMmcWaitTrbResult (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN SD_MMC_HC_TRB *Trb\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN SD_MMC_HC_TRB *Trb\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
EmmcIdentification (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN UINT8 Slot\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
SdCardIdentification (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN UINT8 Slot\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot\r
+ );\r
+\r
+/**\r
+ SD/MMC card clock supply.\r
+\r
+ Refer to SD Host Controller Simplified spec 3.0 Section 3.2.1 for details.\r
+\r
+ @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.\r
+ @param[in] Slot The slot number of the SD card to send the command to.\r
+ @param[in] BusTiming BusTiming at which the frequency change is done.\r
+ @param[in] FirstTimeSetup Flag to indicate whether the clock is being setup for the first time.\r
+ @param[in] ClockFreq The max clock frequency to be set. The unit is KHz.\r
+\r
+ @retval EFI_SUCCESS The clock is supplied successfully.\r
+ @retval Others The clock isn't supplied successfully.\r
+\r
+**/\r
+EFI_STATUS\r
+SdMmcHcClockSupply (\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot,\r
+ IN SD_MMC_BUS_MODE BusTiming,\r
+ IN BOOLEAN FirstTimeSetup,\r
+ IN UINT64 ClockFreq\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
SdMmcHcReset (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN UINT8 Slot\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot\r
);\r
\r
/**\r
**/\r
EFI_STATUS\r
SdMmcHcInitHost (\r
- IN SD_MMC_HC_PRIVATE_DATA *Private,\r
- IN UINT8 Slot\r
+ IN SD_MMC_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Slot\r
);\r
\r
#endif\r
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