--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php.\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _SD_MMC_PCI_HOST_CONTROLLER_PEI_H_\r
+#define _SD_MMC_PCI_HOST_CONTROLLER_PEI_H_\r
+\r
+#include <PiPei.h>\r
+\r
+#include <Ppi/MasterBootMode.h>\r
+#include <Ppi/SdMmcHostController.h>\r
+\r
+#include <IndustryStandard/Pci.h>\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/BaseLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/PciLib.h>\r
+#include <Library/PeiServicesLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+\r
+#define SD_MMC_HC_PEI_SIGNATURE SIGNATURE_32 ('S', 'D', 'M', 'C')\r
+\r
+#define MAX_SD_MMC_HCS 8\r
+#define MAX_SD_MMC_SLOTS 6\r
+\r
+//\r
+// SD Host Controller SlotInfo Register Offset\r
+//\r
+#define SD_MMC_HC_PEI_SLOT_OFFSET 0x40\r
+\r
+typedef struct {\r
+ UINT8 FirstBar:3; // bit 0:2\r
+ UINT8 Reserved:1; // bit 3\r
+ UINT8 SlotNum:3; // bit 4:6\r
+ UINT8 Reserved1:1; // bit 7\r
+} SD_MMC_HC_PEI_SLOT_INFO;\r
+\r
+typedef struct {\r
+ UINTN SlotNum;\r
+ UINTN MmioBarAddr[MAX_SD_MMC_SLOTS];\r
+} SD_MMC_HC_PEI_BAR;\r
+\r
+typedef struct {\r
+ UINTN Signature;\r
+ EDKII_SD_MMC_HOST_CONTROLLER_PPI SdMmcHostControllerPpi;\r
+ EFI_PEI_PPI_DESCRIPTOR PpiList;\r
+ UINTN TotalSdMmcHcs;\r
+ SD_MMC_HC_PEI_BAR MmioBar[MAX_SD_MMC_HCS];\r
+} SD_MMC_HC_PEI_PRIVATE_DATA;\r
+\r
+#define SD_MMC_HC_PEI_PRIVATE_DATA_FROM_THIS(a) CR (a, SD_MMC_HC_PEI_PRIVATE_DATA, SdMmcHostControllerPpi, SD_MMC_HC_PEI_SIGNATURE)\r
+\r
+/**\r
+ Get the MMIO base address of SD/MMC host controller.\r
+\r
+ @param[in] This The protocol instance pointer.\r
+ @param[in] ControllerId The ID of the SD/MMC host controller.\r
+ @param[in,out] MmioBar The pointer to store the array of available\r
+ SD/MMC host controller slot MMIO base addresses.\r
+ The entry number of the array is specified by BarNum.\r
+ @param[out] BarNum The pointer to store the supported bar number.\r
+\r
+ @retval EFI_SUCCESS The operation succeeds.\r
+ @retval EFI_INVALID_PARAMETER The parameters are invalid.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+GetSdMmcHcMmioBar (\r
+ IN EDKII_SD_MMC_HOST_CONTROLLER_PPI *This,\r
+ IN UINT8 ControllerId,\r
+ IN OUT UINTN **MmioBar,\r
+ OUT UINT8 *BarNum\r
+ );\r
+\r
+#endif\r