\r
The definition for UHCI driver model and HC protocol routines.\r
\r
-Copyright (c) 2004 - 2009, Intel Corporation\r
-All rights reserved. This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <Library/BaseLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/PcdLib.h>\r
+#include <Library/ReportStatusCodeLib.h>\r
\r
#include <IndustryStandard/Pci.h>\r
\r
#include "UhciDebug.h"\r
#include "ComponentName.h"\r
\r
-typedef enum {\r
- UHC_1_MICROSECOND = 1,\r
- UHC_1_MILLISECOND = 1000 * UHC_1_MICROSECOND,\r
- UHC_1_SECOND = 1000 * UHC_1_MILLISECOND,\r
+//\r
+// UHC timeout experience values\r
+//\r
\r
- //\r
- // UHCI register operation timeout, set by experience\r
- //\r
- UHC_GENERIC_TIMEOUT = UHC_1_SECOND,\r
+#define UHC_1_MICROSECOND 1\r
+#define UHC_1_MILLISECOND (1000 * UHC_1_MICROSECOND)\r
+#define UHC_1_SECOND (1000 * UHC_1_MILLISECOND)\r
\r
- //\r
- // Wait for force global resume(FGR) complete, refers to\r
- // specification[UHCI11-2.1.1]\r
- //\r
- UHC_FORCE_GLOBAL_RESUME_STALL = 20 * UHC_1_MILLISECOND,\r
+//\r
+// UHCI register operation timeout, set by experience\r
+//\r
+#define UHC_GENERIC_TIMEOUT UHC_1_SECOND\r
\r
- //\r
- // Wait for roothub port reset and recovery, reset stall\r
- // is set by experience, and recovery stall refers to\r
- // specification[UHCI11-2.1.1]\r
- //\r
- UHC_ROOT_PORT_RESET_STALL = 50 * UHC_1_MILLISECOND,\r
- UHC_ROOT_PORT_RECOVERY_STALL = 10 * UHC_1_MILLISECOND,\r
+//\r
+// Wait for force global resume(FGR) complete, refers to\r
+// specification[UHCI11-2.1.1]\r
+//\r
+#define UHC_FORCE_GLOBAL_RESUME_STALL (20 * UHC_1_MILLISECOND)\r
\r
- //\r
- // Sync and Async transfer polling interval, set by experience,\r
- // and the unit of Async is 100us.\r
- //\r
- UHC_SYNC_POLL_INTERVAL = 50 * UHC_1_MICROSECOND,\r
- UHC_ASYNC_POLL_INTERVAL = 50 * 10000UL\r
-}UHC_TIMEOUT_EXPERIENCE_VALUE;\r
+//\r
+// Wait for roothub port reset and recovery, reset stall\r
+// is set by experience, and recovery stall refers to\r
+// specification[UHCI11-2.1.1]\r
+//\r
+#define UHC_ROOT_PORT_RESET_STALL (50 * UHC_1_MILLISECOND)\r
+#define UHC_ROOT_PORT_RECOVERY_STALL (10 * UHC_1_MILLISECOND)\r
\r
+//\r
+// Sync and Async transfer polling interval, set by experience,\r
+// and the unit of Async is 100us.\r
+//\r
+#define UHC_SYNC_POLL_INTERVAL (1 * UHC_1_MILLISECOND)\r
+#define UHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r
\r
//\r
// UHC raises TPL to TPL_NOTIFY to serialize all its operations\r
\r
#pragma pack(1)\r
typedef struct {\r
- UINT8 PI;\r
+ UINT8 ProgInterface;\r
UINT8 SubClassCode;\r
UINT8 BaseCode;\r
} USB_CLASSC;\r
UINT32 Signature;\r
EFI_USB2_HC_PROTOCOL Usb2Hc;\r
EFI_PCI_IO_PROTOCOL *PciIo;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
UINT64 OriginalPciAttributes;\r
\r
//\r
// Schedule data structures\r
//\r
- UINT32 *FrameBase;\r
+ UINT32 *FrameBase; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r
+ UINT32 *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r
UHCI_QH_SW *SyncIntQh;\r
UHCI_QH_SW *CtrlQh;\r
UHCI_QH_SW *BulkQh;\r
VOID *FrameMapping;\r
\r
//\r
- // ExitBootServicesEvent is used to stop the EHC DMA operation \r
+ // ExitBootServicesEvent is used to stop the EHC DMA operation\r
// after exit boot service.\r
//\r
EFI_EVENT ExitBootServiceEvent;\r
);\r
\r
/**\r
- Stop this driver on ControllerHandle. Support stoping any child handles\r
+ Stop this driver on ControllerHandle. Support stopping any child handles\r
created by this driver.\r
\r
@param This Protocol instance pointer.\r