modify coding style to pass ecc tool and provide comments that complied with Doxgen.

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / UhciReg.h

diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h b/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
index 224f402c3c5cf6830636dd7bd0dd350488a37292..8ba1cc23cd07f7aed6f2c58dc272bc9955c79cb8 100644 (file)
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciReg.h
@@ -1,5 +1,7 @@
 /** @file\r
 \r
+  The definition for UHCI register operation routines.\r
+\r
 Copyright (c) 2007 - 2008, Intel Corporation\r
 All rights reserved. This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
@@ -9,17 +11,6 @@ http://opensource.org/licenses/bsd-license.php
 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
-Module Name:\r
-\r
-  UhciReg.h\r
-\r
-Abstract:\r
-\r
-  The definition for UHCI register operation routines.\r
-\r
-Revision History\r
-\r
-\r
 **/\r
 \r
 #ifndef _EFI_UHCI_REG_H_\r
@@ -27,7 +18,7 @@ Revision History
 \r
 #define BIT(a)  (1 << (a))\r
 \r
-enum {\r
+typedef enum {\r
   UHCI_FRAME_NUM        = 1024,\r
 \r
   //\r
@@ -104,16 +95,16 @@ enum {
   USBTD_NAK             = BIT(3),  // NAK is received\r
   USBTD_CRC             = BIT(2),  // CRC/Time out error\r
   USBTD_BITSTUFF        = BIT(1)  // Bit stuff error\r
-};\r
+}UHCI_REGISTER_OFFSET;\r
 \r
 \r
 /**\r
-  Read a UHCI register\r
+  Read a UHCI register.\r
 \r
-  @param  PciIo        The EFI_PCI_IO_PROTOCOL to use\r
-  @param  Offset       Register offset to USB_BAR_INDEX\r
+  @param  PciIo        The EFI_PCI_IO_PROTOCOL to use.\r
+  @param  Offset       Register offset to USB_BAR_INDEX.\r
 \r
-  @return Content of register\r
+  @return Content of register.\r
 \r
 **/\r
 UINT16\r
@@ -126,13 +117,13 @@ UhciReadReg (
 \r
 \r
 /**\r
-  Write data to UHCI register\r
+  Write data to UHCI register.\r
 \r
-  @param  PciIo        The EFI_PCI_IO_PROTOCOL to use\r
-  @param  Offset       Register offset to USB_BAR_INDEX\r
-  @param  Data         Data to write\r
+  @param  PciIo        The EFI_PCI_IO_PROTOCOL to use.\r
+  @param  Offset       Register offset to USB_BAR_INDEX.\r
+  @param  Data         Data to write.\r
 \r
-  @return VOID\r
+  @return None.\r
 \r
 **/\r
 VOID\r
@@ -146,13 +137,13 @@ UhciWriteReg (
 \r
 \r
 /**\r
-  Set a bit of the UHCI Register\r
+  Set a bit of the UHCI Register.\r
 \r
-  @param  PciIo        The EFI_PCI_IO_PROTOCOL to use\r
-  @param  Offset       Register offset to USB_BAR_INDEX\r
-  @param  Bit          The bit to set\r
+  @param  PciIo        The EFI_PCI_IO_PROTOCOL to use.\r
+  @param  Offset       Register offset to USB_BAR_INDEX.\r
+  @param  Bit          The bit to set.\r
 \r
-  @return None\r
+  @return None.\r
 \r
 **/\r
 VOID\r
@@ -166,13 +157,13 @@ UhciSetRegBit (
 \r
 \r
 /**\r
-  Clear a bit of the UHCI Register\r
+  Clear a bit of the UHCI Register.\r
 \r
-  @param  PciIo        The PCI_IO protocol to access the PCI\r
-  @param  Offset       Register offset to USB_BAR_INDEX\r
-  @param  Bit          The bit to clear\r
+  @param  PciIo        The PCI_IO protocol to access the PCI.\r
+  @param  Offset       Register offset to USB_BAR_INDEX.\r
+  @param  Bit          The bit to clear.\r
 \r
-  @return None\r
+  @return None.\r
 \r
 **/\r
 VOID\r
@@ -186,11 +177,11 @@ UhciClearRegBit (
 \r
 /**\r
   Clear all the interrutp status bits, these bits\r
-  are Write-Clean\r
+  are Write-Clean.\r
 \r
-  @param  Uhc          The UHCI device\r
+  @param  Uhc          The UHCI device.\r
 \r
-  @return None\r
+  @return None.\r
 \r
 **/\r
 VOID\r
@@ -201,13 +192,13 @@ UhciAckAllInterrupt (
 \r
 \r
 /**\r
-  Stop the host controller\r
+  Stop the host controller.\r
 \r
-  @param  Uhc          The UHCI device\r
-  @param  Timeout      Max time allowed\r
+  @param  Uhc          The UHCI device.\r
+  @param  Timeout      Max time allowed.\r
 \r
-  @retval EFI_SUCCESS  The host controller is stopped\r
-  @retval EFI_TIMEOUT  Failed to stop the host controller\r
+  @retval EFI_SUCCESS  The host controller is stopped.\r
+  @retval EFI_TIMEOUT  Failed to stop the host controller.\r
 \r
 **/\r
 EFI_STATUS\r
@@ -220,12 +211,12 @@ UhciStopHc (
 \r
 \r
 /**\r
-  Check whether the host controller operates well\r
+  Check whether the host controller operates well.\r
 \r
-  @param  PciIo        The PCI_IO protocol to use\r
+  @param  PciIo        The PCI_IO protocol to use.\r
 \r
-  @retval TRUE         Host controller is working\r
-  @retval FALSE        Host controller is halted or system error\r
+  @retval TRUE         Host controller is working.\r
+  @retval FALSE        Host controller is halted or system error.\r
 \r
 **/\r
 BOOLEAN\r
@@ -239,10 +230,10 @@ UhciIsHcWorking (
   Set the UHCI frame list base address. It can't use\r
   UhciWriteReg which access memory in UINT16.\r
 \r
-  @param  PciIo        The EFI_PCI_IO_PROTOCOL to use\r
-  @param  Addr         Address to set\r
+  @param  PciIo        The EFI_PCI_IO_PROTOCOL to use.\r
+  @param  Addr         Address to set.\r
 \r
-  @return VOID\r
+  @return None.\r
 \r
 **/\r
 VOID\r
@@ -254,11 +245,11 @@ UhciSetFrameListBaseAddr (
 \r
 \r
 /**\r
-  Disable USB Emulation\r
+  Disable USB Emulation.\r
 \r
-  @param  PciIo        The EFI_PCI_IO_PROTOCOL protocol to use\r
+  @param  PciIo        The EFI_PCI_IO_PROTOCOL protocol to use.\r
 \r
-  @return VOID\r
+  @return None.\r
 \r
 **/\r
 VOID\r