Change the PciBusDxe driver to install the PCI enumeration complete GUID in the PCI...

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / UhciSched.c

diff --git a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c
index 4d6957d70a47392624e471ffa8ecd403343599aa..af3f4e5ecd611c1b6c4b9feae8157e6f219daff1 100644 (file)
--- a/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c
+++ b/MdeModulePkg/Bus/Pci/UhciDxe/UhciSched.c
@@ -2,8 +2,8 @@
 \r
   The EHCI register operation routines.\r
 \r
-Copyright (c) 2007 - 2010, Intel Corporation\r
-All rights reserved. This program and the accompanying materials\r
+Copyright (c) 2007 - 2013, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
 http://opensource.org/licenses/bsd-license.php\r
@@ -83,7 +83,7 @@ UhciInitFrameList (
   // Tell the Host Controller where the Frame List lies,\r
   // by set the Frame List Base Address Register.\r
   //\r
-  UhciSetFrameListBaseAddr (Uhc->PciIo, (VOID *) MappedAddr);\r
+  UhciSetFrameListBaseAddr (Uhc->PciIo, (VOID *) (UINTN) MappedAddr);\r
 \r
   //\r
   // Allocate the QH used by sync interrupt/control/bulk transfer.\r
@@ -576,12 +576,23 @@ UhciExecuteTransfer (
   UINTN                   Delay;\r
   BOOLEAN                 Finished;\r
   EFI_STATUS              Status;\r
+  BOOLEAN                 InfiniteLoop;\r
 \r
-  Finished = FALSE;\r
-  Status   = EFI_SUCCESS;\r
-  Delay    = (TimeOut * UHC_1_MILLISECOND / UHC_SYNC_POLL_INTERVAL) + 1;\r
+  Finished     = FALSE;\r
+  Status       = EFI_SUCCESS;\r
+  Delay        = TimeOut * UHC_1_MILLISECOND;\r
+  InfiniteLoop = FALSE;\r
 \r
-  for (Index = 0; Index < Delay; Index++) {\r
+  //\r
+  // According to UEFI spec section 16.2.4, If Timeout is 0, then the caller\r
+  // must wait for the function to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR\r
+  // is returned.\r
+  //\r
+  if (TimeOut == 0) {\r
+    InfiniteLoop = TRUE;\r
+  }\r
+\r
+  for (Index = 0; InfiniteLoop || (Index < Delay); Index++) {\r
     Finished = UhciCheckTdStatus (Uhc, Td, IsLow, QhResult);\r
 \r
     //\r
@@ -591,7 +602,7 @@ UhciExecuteTransfer (
       break;\r
     }\r
 \r
-    gBS->Stall (UHC_SYNC_POLL_INTERVAL);\r
+    gBS->Stall (UHC_1_MICROSECOND);\r
   }\r
 \r
   if (!Finished) {\r