\r
#include <IndustryStandard/Pci.h>\r
\r
-typedef struct _USB_XHCI_INSTANCE USB_XHCI_INSTANCE;\r
-typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;\r
+typedef struct _USB_XHCI_INSTANCE USB_XHCI_INSTANCE;\r
+typedef struct _USB_DEV_CONTEXT USB_DEV_CONTEXT;\r
\r
#include "XhciReg.h"\r
#include "XhciSched.h"\r
//\r
// The unit is microsecond, setting it as 1us.\r
//\r
-#define XHC_1_MICROSECOND (1)\r
+#define XHC_1_MICROSECOND (1)\r
//\r
// The unit is microsecond, setting it as 1ms.\r
//\r
-#define XHC_1_MILLISECOND (1000)\r
+#define XHC_1_MILLISECOND (1000)\r
//\r
// XHC generic timeout experience values.\r
// The unit is millisecond, setting it as 10s.\r
//\r
-#define XHC_GENERIC_TIMEOUT (10 * 1000)\r
+#define XHC_GENERIC_TIMEOUT (10 * 1000)\r
//\r
// XHC reset timeout experience values.\r
// The unit is millisecond, setting it as 1s.\r
//\r
-#define XHC_RESET_TIMEOUT (1000)\r
+#define XHC_RESET_TIMEOUT (1000)\r
//\r
// TRSTRCY delay requirement in usb 2.0 spec chapter 7.1.7.5.\r
// The unit is microsecond, setting it as 10ms.\r
//\r
-#define XHC_RESET_RECOVERY_DELAY (10 * 1000)\r
+#define XHC_RESET_RECOVERY_DELAY (10 * 1000)\r
//\r
// XHC async transfer timer interval, set by experience.\r
// The unit is 100us, takes 1ms as interval.\r
//\r
-#define XHC_ASYNC_TIMER_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r
+#define XHC_ASYNC_TIMER_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r
\r
//\r
// XHC raises TPL to TPL_NOTIFY to serialize all its operations\r
// to protect shared data structures.\r
//\r
-#define XHC_TPL TPL_NOTIFY\r
+#define XHC_TPL TPL_NOTIFY\r
\r
-#define CMD_RING_TRB_NUMBER 0x100\r
-#define TR_RING_TRB_NUMBER 0x100\r
-#define ERST_NUMBER 0x01\r
-#define EVENT_RING_TRB_NUMBER 0x200\r
+#define CMD_RING_TRB_NUMBER 0x100\r
+#define TR_RING_TRB_NUMBER 0x100\r
+#define ERST_NUMBER 0x01\r
+#define EVENT_RING_TRB_NUMBER 0x200\r
\r
-#define CMD_INTER 0\r
-#define CTRL_INTER 1\r
-#define BULK_INTER 2\r
-#define INT_INTER 3\r
-#define INT_INTER_ASYNC 4\r
+#define CMD_INTER 0\r
+#define CTRL_INTER 1\r
+#define BULK_INTER 2\r
+#define INT_INTER 3\r
+#define INT_INTER_ASYNC 4\r
\r
-#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)\r
+#define EFI_LIST_CONTAINER(Entry, Type, Field) BASE_CR(Entry, Type, Field)\r
\r
-#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))\r
-#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINT64)(UINTN)(Addr64), 32) & 0xFFFFFFFF))\r
-#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r
+#define XHC_LOW_32BIT(Addr64) ((UINT32)(((UINTN)(Addr64)) & 0xFFFFFFFF))\r
+#define XHC_HIGH_32BIT(Addr64) ((UINT32)(RShiftU64((UINT64)(UINTN)(Addr64), 32) & 0xFFFFFFFF))\r
+#define XHC_BIT_IS_SET(Data, Bit) ((BOOLEAN)(((Data) & (Bit)) == (Bit)))\r
\r
#define XHC_REG_BIT_IS_SET(Xhc, Offset, Bit) \\r
(XHC_BIT_IS_SET(XhcReadOpReg ((Xhc), (Offset)), (Bit)))\r
\r
-#define XHCI_IS_DATAIN(EndpointAddr) XHC_BIT_IS_SET((EndpointAddr), 0x80)\r
+#define XHCI_IS_DATAIN(EndpointAddr) XHC_BIT_IS_SET((EndpointAddr), 0x80)\r
\r
-#define XHCI_INSTANCE_SIG SIGNATURE_32 ('x', 'h', 'c', 'i')\r
-#define XHC_FROM_THIS(a) CR(a, USB_XHCI_INSTANCE, Usb2Hc, XHCI_INSTANCE_SIG)\r
+#define XHCI_INSTANCE_SIG SIGNATURE_32 ('x', 'h', 'c', 'i')\r
+#define XHC_FROM_THIS(a) CR(a, USB_XHCI_INSTANCE, Usb2Hc, XHCI_INSTANCE_SIG)\r
\r
#define USB_DESC_TYPE_HUB 0x29\r
#define USB_DESC_TYPE_HUB_SUPER_SPEED 0x2a\r
//\r
#pragma pack(1)\r
typedef struct {\r
- UINT8 ProgInterface;\r
- UINT8 SubClassCode;\r
- UINT8 BaseCode;\r
+ UINT8 ProgInterface;\r
+ UINT8 SubClassCode;\r
+ UINT8 BaseCode;\r
} USB_CLASSC;\r
\r
typedef struct {\r
- UINT8 Length;\r
- UINT8 DescType;\r
- UINT8 NumPorts;\r
- UINT16 HubCharacter;\r
- UINT8 PwrOn2PwrGood;\r
- UINT8 HubContrCurrent;\r
- UINT8 Filler[16];\r
+ UINT8 Length;\r
+ UINT8 DescType;\r
+ UINT8 NumPorts;\r
+ UINT16 HubCharacter;\r
+ UINT8 PwrOn2PwrGood;\r
+ UINT8 HubContrCurrent;\r
+ UINT8 Filler[16];\r
} EFI_USB_HUB_DESCRIPTOR;\r
#pragma pack()\r
\r
//\r
// Whether this entry in UsbDevContext array is used or not.\r
//\r
- BOOLEAN Enabled;\r
+ BOOLEAN Enabled;\r
//\r
// The slot id assigned to the new device through XHCI's Enable_Slot cmd.\r
//\r
- UINT8 SlotId;\r
+ UINT8 SlotId;\r
//\r
// The route string presented an attached usb device.\r
//\r
- USB_DEV_ROUTE RouteString;\r
+ USB_DEV_ROUTE RouteString;\r
//\r
// The route string of parent device if it exists. Otherwise it's zero.\r
//\r
- USB_DEV_ROUTE ParentRouteString;\r
+ USB_DEV_ROUTE ParentRouteString;\r
//\r
// The actual device address assigned by XHCI through Address_Device command.\r
//\r
- UINT8 XhciDevAddr;\r
+ UINT8 XhciDevAddr;\r
//\r
// The requested device address from UsbBus driver through Set_Address standard usb request.\r
// As XHCI spec replaces this request with Address_Device command, we have to record the\r
// through EFI_USB2_HC_PROTOCOL. Xhci driver would be responsible for translating it to actual\r
// device address and access the actual device.\r
//\r
- UINT8 BusDevAddr;\r
+ UINT8 BusDevAddr;\r
//\r
// The pointer to the input device context.\r
//\r
- VOID *InputContext;\r
+ VOID *InputContext;\r
//\r
// The pointer to the output device context.\r
//\r
- VOID *OutputContext;\r
+ VOID *OutputContext;\r
//\r
// The transfer queue for every endpoint.\r
//\r
- VOID *EndpointTransferRing[31];\r
+ VOID *EndpointTransferRing[31];\r
//\r
// The device descriptor which is stored to support XHCI's Evaluate_Context cmd.\r
//\r
- EFI_USB_DEVICE_DESCRIPTOR DevDesc;\r
+ EFI_USB_DEVICE_DESCRIPTOR DevDesc;\r
//\r
// As a usb device may include multiple configuration descriptors, we dynamically allocate an array\r
// to store them.\r
// such as Interface descriptor, Endpoint descriptor, and so on.\r
// These information is used to support XHCI's Config_Endpoint cmd.\r
//\r
- EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;\r
+ EFI_USB_CONFIG_DESCRIPTOR **ConfDesc;\r
//\r
// A device has an active Configuration.\r
//\r
- UINT8 ActiveConfiguration;\r
+ UINT8 ActiveConfiguration;\r
//\r
// Every interface has an active AlternateSetting.\r
//\r
- UINT8 *ActiveAlternateSetting;\r
+ UINT8 *ActiveAlternateSetting;\r
};\r
\r
struct _USB_XHCI_INSTANCE {\r
- UINT32 Signature;\r
- EFI_PCI_IO_PROTOCOL *PciIo;\r
- UINT64 OriginalPciAttributes;\r
- USBHC_MEM_POOL *MemPool;\r
+ UINT32 Signature;\r
+ EFI_PCI_IO_PROTOCOL *PciIo;\r
+ UINT64 OriginalPciAttributes;\r
+ USBHC_MEM_POOL *MemPool;\r
\r
- EFI_USB2_HC_PROTOCOL Usb2Hc;\r
+ EFI_USB2_HC_PROTOCOL Usb2Hc;\r
\r
- EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
+ EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
\r
//\r
// ExitBootServicesEvent is used to set OS semaphore and\r
// stop the XHC DMA operation after exit boot service.\r
//\r
- EFI_EVENT ExitBootServiceEvent;\r
- EFI_EVENT PollTimer;\r
- LIST_ENTRY AsyncIntTransfers;\r
-\r
- UINT8 CapLength; ///< Capability Register Length\r
- XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1\r
- XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2\r
- XHC_HCCPARAMS HcCParams; ///< Capability Parameters\r
- UINT32 DBOff; ///< Doorbell Offset\r
- UINT32 RTSOff; ///< Runtime Register Space Offset\r
- UINT16 MaxInterrupt;\r
- UINT32 PageSize;\r
- UINT64 *ScratchBuf;\r
- VOID *ScratchMap;\r
- UINT32 MaxScratchpadBufs;\r
- UINT64 *ScratchEntry;\r
- UINTN *ScratchEntryMap;\r
- UINT32 ExtCapRegBase;\r
- UINT32 UsbLegSupOffset;\r
- UINT32 DebugCapSupOffset;\r
- UINT64 *DCBAA;\r
- VOID *DCBAAMap;\r
- UINT32 MaxSlotsEn;\r
- URB *PendingUrb;\r
+ EFI_EVENT ExitBootServiceEvent;\r
+ EFI_EVENT PollTimer;\r
+ LIST_ENTRY AsyncIntTransfers;\r
+\r
+ UINT8 CapLength; ///< Capability Register Length\r
+ XHC_HCSPARAMS1 HcSParams1; ///< Structural Parameters 1\r
+ XHC_HCSPARAMS2 HcSParams2; ///< Structural Parameters 2\r
+ XHC_HCCPARAMS HcCParams; ///< Capability Parameters\r
+ UINT32 DBOff; ///< Doorbell Offset\r
+ UINT32 RTSOff; ///< Runtime Register Space Offset\r
+ UINT16 MaxInterrupt;\r
+ UINT32 PageSize;\r
+ UINT64 *ScratchBuf;\r
+ VOID *ScratchMap;\r
+ UINT32 MaxScratchpadBufs;\r
+ UINT64 *ScratchEntry;\r
+ UINTN *ScratchEntryMap;\r
+ UINT32 ExtCapRegBase;\r
+ UINT32 UsbLegSupOffset;\r
+ UINT32 DebugCapSupOffset;\r
+ UINT64 *DCBAA;\r
+ VOID *DCBAAMap;\r
+ UINT32 MaxSlotsEn;\r
+ URB *PendingUrb;\r
//\r
// Cmd Transfer Ring\r
//\r
- TRANSFER_RING CmdRing;\r
+ TRANSFER_RING CmdRing;\r
//\r
// EventRing\r
//\r
- EVENT_RING EventRing;\r
+ EVENT_RING EventRing;\r
//\r
// Misc\r
//\r
- EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
+ EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
\r
//\r
// Store device contexts managed by XHCI instance\r
// The array supports up to 255 devices, entry 0 is reserved and should not be used.\r
//\r
- USB_DEV_CONTEXT UsbDevContext[256];\r
+ USB_DEV_CONTEXT UsbDevContext[256];\r
\r
- BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device\r
+ BOOLEAN Support64BitDma; // Whether 64 bit DMA may be used with this device\r
};\r
\r
-\r
-extern EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding;\r
-extern EFI_COMPONENT_NAME_PROTOCOL gXhciComponentName;\r
-extern EFI_COMPONENT_NAME2_PROTOCOL gXhciComponentName2;\r
+extern EFI_DRIVER_BINDING_PROTOCOL gXhciDriverBinding;\r
+extern EFI_COMPONENT_NAME_PROTOCOL gXhciComponentName;\r
+extern EFI_COMPONENT_NAME2_PROTOCOL gXhciComponentName2;\r
\r
/**\r
Test to see if this driver supports ControllerHandle. Any\r
EFI_STATUS\r
EFIAPI\r
XhcDriverBindingSupported (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
XhcDriverBindingStart (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
);\r
\r
/**\r
EFI_STATUS\r
EFIAPI\r
XhcDriverBindingStop (\r
- IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
- IN EFI_HANDLE Controller,\r
- IN UINTN NumberOfChildren,\r
- IN EFI_HANDLE *ChildHandleBuffer\r
+ IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
+ IN EFI_HANDLE Controller,\r
+ IN UINTN NumberOfChildren,\r
+ IN EFI_HANDLE *ChildHandleBuffer\r
);\r
\r
/**\r
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