1) remove wrong global variable usage because it will bring data corrupt if there...

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / XhciDxe / XhciReg.c

diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
index d4c22d094eea0b6ba3b55a1b014c6b37a09e59c8..874967974c87daddd4acf9ea90b3fc3d8d51bb13 100644 (file)
--- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
+++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciReg.c
@@ -18,7 +18,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 /**\r
   Read 1-byte width XHCI capability register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the 1-byte width capability register.\r
 \r
   @return The register content read.\r
@@ -27,7 +27,7 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 **/\r
 UINT8\r
 XhcReadCapReg8 (\r
-  IN  USB_XHCI_DEV        *Xhc,\r
+  IN  USB_XHCI_INSTANCE   *Xhc,\r
   IN  UINT32              Offset\r
   )\r
 {\r
@@ -54,7 +54,7 @@ XhcReadCapReg8 (
 /**\r
   Read 4-bytes width XHCI capability register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the 4-bytes width capability register.\r
 \r
   @return The register content read.\r
@@ -63,7 +63,7 @@ XhcReadCapReg8 (
 **/\r
 UINT32\r
 XhcReadCapReg (\r
-  IN  USB_XHCI_DEV        *Xhc,\r
+  IN  USB_XHCI_INSTANCE   *Xhc,\r
   IN  UINT32              Offset\r
   )\r
 {\r
@@ -90,7 +90,7 @@ XhcReadCapReg (
 /**\r
   Read 4-bytes width XHCI Operational register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the 4-bytes width operational register.\r
 \r
   @return The register content read.\r
@@ -99,7 +99,7 @@ XhcReadCapReg (
 **/\r
 UINT32\r
 XhcReadOpReg (\r
-  IN  USB_XHCI_DEV        *Xhc,\r
+  IN  USB_XHCI_INSTANCE   *Xhc,\r
   IN  UINT32              Offset\r
   )\r
 {\r
@@ -128,14 +128,14 @@ XhcReadOpReg (
 /**\r
   Write the data to the 4-bytes width XHCI operational register.\r
 \r
-  @param  Xhc      The XHCI device.\r
+  @param  Xhc      The XHCI Instance.\r
   @param  Offset   The offset of the 4-bytes width operational register.\r
   @param  Data     The data to write.\r
 \r
 **/\r
 VOID\r
 XhcWriteOpReg (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Data\r
   )\r
@@ -161,14 +161,14 @@ XhcWriteOpReg (
 /**\r
   Write the data to the 2-bytes width XHCI operational register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the 2-bytes width operational register.\r
   @param  Data         The data to write.\r
 \r
 **/\r
 VOID\r
 XhcWriteOpReg16 (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT16               Data\r
   )\r
@@ -194,14 +194,14 @@ XhcWriteOpReg16 (
 /**\r
   Write the data to the 8-bytes width XHCI operational register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the 8-bytes width operational register.\r
   @param  Data         The data to write.\r
 \r
 **/\r
 VOID\r
 XhcWriteOpReg64 (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT64               Data\r
   )\r
@@ -227,7 +227,7 @@ XhcWriteOpReg64 (
 /**\r
   Read XHCI door bell register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the door bell register.\r
 \r
   @return The register content read\r
@@ -235,7 +235,7 @@ XhcWriteOpReg64 (
 **/\r
 UINT32\r
 XhcReadDoorBellReg (\r
-  IN  USB_XHCI_DEV        *Xhc,\r
+  IN  USB_XHCI_INSTANCE   *Xhc,\r
   IN  UINT32              Offset\r
   )\r
 {\r
@@ -264,14 +264,14 @@ XhcReadDoorBellReg (
 /**\r
   Write the data to the XHCI door bell register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the door bell register.\r
   @param  Data         The data to write.\r
 \r
 **/\r
 VOID\r
 XhcWriteDoorBellReg (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Data\r
   )\r
@@ -297,7 +297,7 @@ XhcWriteDoorBellReg (
 /**\r
   Read XHCI runtime register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the runtime register.\r
 \r
   @return The register content read\r
@@ -305,7 +305,7 @@ XhcWriteDoorBellReg (
 **/\r
 UINT32\r
 XhcReadRuntimeReg (\r
-  IN  USB_XHCI_DEV        *Xhc,\r
+  IN  USB_XHCI_INSTANCE   *Xhc,\r
   IN  UINT32              Offset\r
   )\r
 {\r
@@ -334,7 +334,7 @@ XhcReadRuntimeReg (
 /**\r
   Read 8-bytes width XHCI runtime register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the 8-bytes width runtime register.\r
 \r
   @return The register content read\r
@@ -342,7 +342,7 @@ XhcReadRuntimeReg (
 **/\r
 UINT64\r
 XhcReadRuntimeReg64 (\r
-  IN  USB_XHCI_DEV        *Xhc,\r
+  IN  USB_XHCI_INSTANCE   *Xhc,\r
   IN  UINT32              Offset\r
   )\r
 {\r
@@ -371,14 +371,14 @@ XhcReadRuntimeReg64 (
 /**\r
   Write the data to the XHCI runtime register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the runtime register.\r
   @param  Data         The data to write.\r
 \r
 **/\r
 VOID\r
 XhcWriteRuntimeReg (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Data\r
   )\r
@@ -404,14 +404,14 @@ XhcWriteRuntimeReg (
 /**\r
   Write the data to the 8-bytes width XHCI runtime register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the 8-bytes width runtime register.\r
   @param  Data         The data to write.\r
 \r
 **/\r
 VOID\r
 XhcWriteRuntimeReg64 (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT64               Data\r
   )\r
@@ -437,7 +437,7 @@ XhcWriteRuntimeReg64 (
 /**\r
   Read XHCI extended capability register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the extended capability register.\r
 \r
   @return The register content read\r
@@ -445,7 +445,7 @@ XhcWriteRuntimeReg64 (
 **/\r
 UINT32\r
 XhcReadExtCapReg (\r
-  IN  USB_XHCI_DEV        *Xhc,\r
+  IN  USB_XHCI_INSTANCE   *Xhc,\r
   IN  UINT32              Offset\r
   )\r
 {\r
@@ -474,14 +474,14 @@ XhcReadExtCapReg (
 /**\r
   Write the data to the XHCI extended capability register.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the extended capability register.\r
   @param  Data         The data to write.\r
 \r
 **/\r
 VOID\r
 XhcWriteExtCapReg (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Data\r
   )\r
@@ -508,14 +508,14 @@ XhcWriteExtCapReg (
 /**\r
   Set one bit of the runtime register while keeping other bits.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the runtime register.\r
   @param  Bit          The bit mask of the register to set.\r
 \r
 **/\r
 VOID\r
 XhcSetRuntimeRegBit (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Bit\r
   )\r
@@ -530,14 +530,14 @@ XhcSetRuntimeRegBit (
 /**\r
   Clear one bit of the runtime register while keeping other bits.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the runtime register.\r
   @param  Bit          The bit mask of the register to set.\r
 \r
 **/\r
 VOID\r
 XhcClearRuntimeRegBit (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Bit\r
   )\r
@@ -552,14 +552,14 @@ XhcClearRuntimeRegBit (
 /**\r
   Set one bit of the operational register while keeping other bits.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the operational register.\r
   @param  Bit          The bit mask of the register to set.\r
 \r
 **/\r
 VOID\r
 XhcSetOpRegBit (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Bit\r
   )\r
@@ -575,14 +575,14 @@ XhcSetOpRegBit (
 /**\r
   Clear one bit of the operational register while keeping other bits.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the operational register.\r
   @param  Bit          The bit mask of the register to clear.\r
 \r
 **/\r
 VOID\r
 XhcClearOpRegBit (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Bit\r
   )\r
@@ -598,7 +598,7 @@ XhcClearOpRegBit (
   Wait the operation register's bit as specified by Bit\r
   to become set (or clear).\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Offset       The offset of the operation register.\r
   @param  Bit          The bit of the register to wait for.\r
   @param  WaitToSet    Wait the bit to set or clear.\r
@@ -610,7 +610,7 @@ XhcClearOpRegBit (
 **/\r
 EFI_STATUS\r
 XhcWaitOpRegBit (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Offset,\r
   IN UINT32               Bit,\r
   IN BOOLEAN              WaitToSet,\r
@@ -618,13 +618,16 @@ XhcWaitOpRegBit (
   )\r
 {\r
   UINT32                  Index;\r
+  UINTN                   Loop;\r
 \r
-  for (Index = 0; Index < Timeout / XHC_SYNC_POLL_INTERVAL + 1; Index++) {\r
+  Loop   = (Timeout * XHC_1_MILLISECOND / XHC_POLL_DELAY) + 1;\r
+\r
+  for (Index = 0; Index < Loop; Index++) {\r
     if (XHC_REG_BIT_IS_SET (Xhc, Offset, Bit) == WaitToSet) {\r
       return EFI_SUCCESS;\r
     }\r
 \r
-    gBS->Stall (XHC_SYNC_POLL_INTERVAL);\r
+    gBS->Stall (XHC_POLL_DELAY);\r
   }\r
 \r
   return EFI_TIMEOUT;\r
@@ -633,12 +636,12 @@ XhcWaitOpRegBit (
 /**\r
   Set Bios Ownership\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
 \r
 **/\r
 VOID\r
 XhcSetBiosOwnership (\r
-  IN USB_XHCI_DEV         *Xhc\r
+  IN USB_XHCI_INSTANCE    *Xhc\r
   )\r
 {\r
   UINT32                    Buffer;\r
@@ -653,12 +656,12 @@ XhcSetBiosOwnership (
 /**\r
   Clear Bios Ownership\r
 \r
-  @param  Xhc       The XHCI device.\r
+  @param  Xhc       The XHCI Instance.\r
 \r
 **/\r
 VOID\r
 XhcClearBiosOwnership (\r
-  IN USB_XHCI_DEV         *Xhc\r
+  IN USB_XHCI_INSTANCE    *Xhc\r
   )\r
 {\r
   UINT32                    Buffer;\r
@@ -673,14 +676,14 @@ XhcClearBiosOwnership (
 /**\r
   Calculate the XHCI legacy support capability register offset.\r
 \r
-  @param  Xhc     The XHCI device.\r
+  @param  Xhc     The XHCI Instance.\r
 \r
   @return The offset of XHCI legacy support capability register.\r
 \r
 **/\r
 UINT32\r
 XhcGetLegSupCapAddr (\r
-  IN USB_XHCI_DEV         *Xhc\r
+  IN USB_XHCI_INSTANCE    *Xhc\r
   )\r
 {\r
   UINT32 ExtCapOffset;\r
@@ -710,7 +713,7 @@ XhcGetLegSupCapAddr (
 /**\r
   Whether the XHCI host controller is halted.\r
 \r
-  @param  Xhc     The XHCI device.\r
+  @param  Xhc     The XHCI Instance.\r
 \r
   @retval TRUE    The controller is halted.\r
   @retval FALSE   It isn't halted.\r
@@ -718,7 +721,7 @@ XhcGetLegSupCapAddr (
 **/\r
 BOOLEAN\r
 XhcIsHalt (\r
-  IN USB_XHCI_DEV         *Xhc\r
+  IN USB_XHCI_INSTANCE    *Xhc\r
   )\r
 {\r
   return XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HALT);\r
@@ -728,7 +731,7 @@ XhcIsHalt (
 /**\r
   Whether system error occurred.\r
 \r
-  @param  Xhc      The XHCI device.\r
+  @param  Xhc      The XHCI Instance.\r
 \r
   @retval TRUE     System error happened.\r
   @retval FALSE    No system error.\r
@@ -736,7 +739,7 @@ XhcIsHalt (
 **/\r
 BOOLEAN\r
 XhcIsSysError (\r
-  IN USB_XHCI_DEV         *Xhc\r
+  IN USB_XHCI_INSTANCE    *Xhc\r
   )\r
 {\r
   return XHC_REG_BIT_IS_SET (Xhc, XHC_USBSTS_OFFSET, XHC_USBSTS_HSE);\r
@@ -745,7 +748,7 @@ XhcIsSysError (
 /**\r
   Reset the XHCI host controller.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Timeout      Time to wait before abort (in millisecond, ms).\r
 \r
   @retval EFI_SUCCESS  The XHCI host controller is reset.\r
@@ -754,7 +757,7 @@ XhcIsSysError (
 **/\r
 EFI_STATUS\r
 XhcResetHC (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Timeout\r
   )\r
 {\r
@@ -781,7 +784,7 @@ XhcResetHC (
 /**\r
   Halt the XHCI host controller.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Timeout      Time to wait before abort (in millisecond, ms).\r
 \r
   @return EFI_SUCCESS  The XHCI host controller is halt.\r
@@ -790,7 +793,7 @@ XhcResetHC (
 **/\r
 EFI_STATUS\r
 XhcHaltHC (\r
-  IN USB_XHCI_DEV        *Xhc,\r
+  IN USB_XHCI_INSTANCE   *Xhc,\r
   IN UINT32              Timeout\r
   )\r
 {\r
@@ -805,7 +808,7 @@ XhcHaltHC (
 /**\r
   Set the XHCI host controller to run.\r
 \r
-  @param  Xhc          The XHCI device.\r
+  @param  Xhc          The XHCI Instance.\r
   @param  Timeout      Time to wait before abort (in millisecond, ms).\r
 \r
   @return EFI_SUCCESS  The XHCI host controller is running.\r
@@ -814,7 +817,7 @@ XhcHaltHC (
 **/\r
 EFI_STATUS\r
 XhcRunHC (\r
-  IN USB_XHCI_DEV         *Xhc,\r
+  IN USB_XHCI_INSTANCE    *Xhc,\r
   IN UINT32               Timeout\r
   )\r
 {\r