PEIM to produce gPeiUsb2HostControllerPpiGuid based on gPeiUsbControllerPpiGuid\r
which is used to enable recovery function from USB Drivers.\r
\r
-Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2014 - 2018, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
return Data;\r
}\r
\r
-/**\r
- Read XHCI door bell register.\r
-\r
- @param Xhc The XHCI device.\r
- @param Offset The offset of the door bell register.\r
-\r
- @return The register content read\r
\r
-**/\r
-UINT32\r
-XhcPeiReadDoorBellReg (\r
- IN PEI_XHC_DEV *Xhc,\r
- IN UINT32 Offset\r
- )\r
-{\r
- UINT32 Data;\r
-\r
- ASSERT (Xhc->DBOff != 0);\r
-\r
- Data = MmioRead32 (Xhc->UsbHostControllerBaseAddress + Xhc->DBOff + Offset);\r
-\r
- return Data;\r
-}\r
\r
/**\r
Write the data to the XHCI door bell register.\r
DEBUG ((EFI_D_INFO, "XhcPeiGetRootHubPortStatus: Port: %x State: %x\n", PortNumber, State));\r
\r
//\r
- // According to XHCI 1.0 spec, bit 10~13 of the root port status register identifies the speed of the attached device.\r
+ // According to XHCI 1.1 spec November 2017,\r
+ // bit 10~13 of the root port status register identifies the speed of the attached device.\r
//\r
switch ((State & XHC_PORTSC_PS) >> 10) {\r
case 2:\r
break;\r
\r
case 4:\r
+ case 5:\r
PortStatus->PortStatus |= USB_PORT_STAT_SUPER_SPEED;\r
break;\r
\r