/** @file\r
\r
- Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php.\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
EFI_STATUS\r
EFIAPI\r
SdPeimHcRwMmio (\r
- IN UINTN Address,\r
- IN BOOLEAN Read,\r
- IN UINT8 Count,\r
- IN OUT VOID *Data\r
+ IN UINTN Address,\r
+ IN BOOLEAN Read,\r
+ IN UINT8 Count,\r
+ IN OUT VOID *Data\r
)\r
{\r
- if ((Address == 0) || (Data == NULL)) {\r
+ if ((Address == 0) || (Data == NULL)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
switch (Count) {\r
case 1:\r
if (Read) {\r
- *(UINT8*)Data = MmioRead8 (Address);\r
+ *(UINT8 *)Data = MmioRead8 (Address);\r
} else {\r
- MmioWrite8 (Address, *(UINT8*)Data);\r
+ MmioWrite8 (Address, *(UINT8 *)Data);\r
}\r
+\r
break;\r
case 2:\r
if (Read) {\r
- *(UINT16*)Data = MmioRead16 (Address);\r
+ *(UINT16 *)Data = MmioRead16 (Address);\r
} else {\r
- MmioWrite16 (Address, *(UINT16*)Data);\r
+ MmioWrite16 (Address, *(UINT16 *)Data);\r
}\r
+\r
break;\r
case 4:\r
if (Read) {\r
- *(UINT32*)Data = MmioRead32 (Address);\r
+ *(UINT32 *)Data = MmioRead32 (Address);\r
} else {\r
- MmioWrite32 (Address, *(UINT32*)Data);\r
+ MmioWrite32 (Address, *(UINT32 *)Data);\r
}\r
+\r
break;\r
case 8:\r
if (Read) {\r
- *(UINT64*)Data = MmioRead64 (Address);\r
+ *(UINT64 *)Data = MmioRead64 (Address);\r
} else {\r
- MmioWrite64 (Address, *(UINT64*)Data);\r
+ MmioWrite64 (Address, *(UINT64 *)Data);\r
}\r
+\r
break;\r
default:\r
ASSERT (FALSE);\r
EFI_STATUS\r
EFIAPI\r
SdPeimHcOrMmio (\r
- IN UINTN Address,\r
- IN UINT8 Count,\r
- IN VOID *OrData\r
+ IN UINTN Address,\r
+ IN UINT8 Count,\r
+ IN VOID *OrData\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT64 Data;\r
- UINT64 Or;\r
+ EFI_STATUS Status;\r
+ UINT64 Data;\r
+ UINT64 Or;\r
\r
Status = SdPeimHcRwMmio (Address, TRUE, Count, &Data);\r
if (EFI_ERROR (Status)) {\r
}\r
\r
if (Count == 1) {\r
- Or = *(UINT8*) OrData;\r
+ Or = *(UINT8 *)OrData;\r
} else if (Count == 2) {\r
- Or = *(UINT16*) OrData;\r
+ Or = *(UINT16 *)OrData;\r
} else if (Count == 4) {\r
- Or = *(UINT32*) OrData;\r
+ Or = *(UINT32 *)OrData;\r
} else if (Count == 8) {\r
- Or = *(UINT64*) OrData;\r
+ Or = *(UINT64 *)OrData;\r
} else {\r
return EFI_INVALID_PARAMETER;\r
}\r
EFI_STATUS\r
EFIAPI\r
SdPeimHcAndMmio (\r
- IN UINTN Address,\r
- IN UINT8 Count,\r
- IN VOID *AndData\r
+ IN UINTN Address,\r
+ IN UINT8 Count,\r
+ IN VOID *AndData\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT64 Data;\r
- UINT64 And;\r
+ EFI_STATUS Status;\r
+ UINT64 Data;\r
+ UINT64 And;\r
\r
Status = SdPeimHcRwMmio (Address, TRUE, Count, &Data);\r
if (EFI_ERROR (Status)) {\r
}\r
\r
if (Count == 1) {\r
- And = *(UINT8*) AndData;\r
+ And = *(UINT8 *)AndData;\r
} else if (Count == 2) {\r
- And = *(UINT16*) AndData;\r
+ And = *(UINT16 *)AndData;\r
} else if (Count == 4) {\r
- And = *(UINT32*) AndData;\r
+ And = *(UINT32 *)AndData;\r
} else if (Count == 8) {\r
- And = *(UINT64*) AndData;\r
+ And = *(UINT64 *)AndData;\r
} else {\r
return EFI_INVALID_PARAMETER;\r
}\r
EFI_STATUS\r
EFIAPI\r
SdPeimHcCheckMmioSet (\r
- IN UINTN Address,\r
- IN UINT8 Count,\r
- IN UINT64 MaskValue,\r
- IN UINT64 TestValue\r
+ IN UINTN Address,\r
+ IN UINT8 Count,\r
+ IN UINT64 MaskValue,\r
+ IN UINT64 TestValue\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT64 Value;\r
+ EFI_STATUS Status;\r
+ UINT64 Value;\r
\r
//\r
// Access PCI MMIO space to see if the value is the tested one.\r
EFI_STATUS\r
EFIAPI\r
SdPeimHcWaitMmioSet (\r
- IN UINTN Address,\r
- IN UINT8 Count,\r
- IN UINT64 MaskValue,\r
- IN UINT64 TestValue,\r
- IN UINT64 Timeout\r
+ IN UINTN Address,\r
+ IN UINT8 Count,\r
+ IN UINT64 MaskValue,\r
+ IN UINT64 TestValue,\r
+ IN UINT64 Timeout\r
)\r
{\r
- EFI_STATUS Status;\r
- BOOLEAN InfiniteWait;\r
+ EFI_STATUS Status;\r
+ BOOLEAN InfiniteWait;\r
\r
if (Timeout == 0) {\r
InfiniteWait = TRUE;\r
**/\r
EFI_STATUS\r
SdPeimHcReset (\r
- IN UINTN Bar\r
+ IN UINTN Bar\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT8 SwReset;\r
+ EFI_STATUS Status;\r
+ UINT8 SwReset;\r
\r
SwReset = 0xFF;\r
Status = SdPeimHcRwMmio (Bar + SD_HC_SW_RST, FALSE, sizeof (SwReset), &SwReset);\r
\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimHcReset: write full 1 fails: %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimHcReset: write full 1 fails: %r\n", Status));\r
return Status;\r
}\r
\r
SD_TIMEOUT\r
);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_INFO, "SdPeimHcReset: reset done with %r\n", Status));\r
+ DEBUG ((DEBUG_INFO, "SdPeimHcReset: reset done with %r\n", Status));\r
return Status;\r
}\r
+\r
//\r
// Enable all interrupt after reset all.\r
//\r
**/\r
EFI_STATUS\r
SdPeimHcEnableInterrupt (\r
- IN UINTN Bar\r
+ IN UINTN Bar\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT16 IntStatus;\r
+ EFI_STATUS Status;\r
+ UINT16 IntStatus;\r
\r
//\r
// Enable all bits in Error Interrupt Status Enable Register\r
//\r
IntStatus = 0xFFFF;\r
- Status = SdPeimHcRwMmio (Bar + SD_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);\r
+ Status = SdPeimHcRwMmio (Bar + SD_HC_ERR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
// Enable all bits in Normal Interrupt Status Enable Register\r
//\r
IntStatus = 0xFFFF;\r
- Status = SdPeimHcRwMmio (Bar + SD_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);\r
+ Status = SdPeimHcRwMmio (Bar + SD_HC_NOR_INT_STS_EN, FALSE, sizeof (IntStatus), &IntStatus);\r
\r
return Status;\r
}\r
**/\r
EFI_STATUS\r
SdPeimHcGetCapability (\r
- IN UINTN Bar,\r
- OUT SD_HC_SLOT_CAP *Capability\r
+ IN UINTN Bar,\r
+ OUT SD_HC_SLOT_CAP *Capability\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT64 Cap;\r
+ EFI_STATUS Status;\r
+ UINT64 Cap;\r
\r
Status = SdPeimHcRwMmio (Bar + SD_HC_CAP, TRUE, sizeof (Cap), &Cap);\r
if (EFI_ERROR (Status)) {\r
**/\r
EFI_STATUS\r
SdPeimHcCardDetect (\r
- IN UINTN Bar\r
+ IN UINTN Bar\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT16 Data;\r
- UINT32 PresentState;\r
+ EFI_STATUS Status;\r
+ UINT16 Data;\r
+ UINT32 PresentState;\r
\r
//\r
// Check Normal Interrupt Status Register\r
**/\r
EFI_STATUS\r
SdPeimHcStopClock (\r
- IN UINTN Bar\r
+ IN UINTN Bar\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 PresentState;\r
- UINT16 ClockCtrl;\r
+ EFI_STATUS Status;\r
+ UINT32 PresentState;\r
+ UINT16 ClockCtrl;\r
\r
//\r
// Ensure no SD transactions are occurring on the SD Bus by\r
//\r
// Set SD Clock Enable in the Clock Control register to 0\r
//\r
- ClockCtrl = (UINT16)~BIT2;\r
- Status = SdPeimHcAndMmio (Bar + SD_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);\r
+ ClockCtrl = (UINT16) ~BIT2;\r
+ Status = SdPeimHcAndMmio (Bar + SD_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);\r
\r
return Status;\r
}\r
**/\r
EFI_STATUS\r
SdPeimHcClockSupply (\r
- IN UINTN Bar,\r
- IN UINT64 ClockFreq\r
+ IN UINTN Bar,\r
+ IN UINT64 ClockFreq\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_HC_SLOT_CAP Capability;\r
- UINT32 BaseClkFreq;\r
- UINT32 SettingFreq;\r
- UINT32 Divisor;\r
- UINT32 Remainder;\r
- UINT16 ControllerVer;\r
- UINT16 ClockCtrl;\r
+ EFI_STATUS Status;\r
+ SD_HC_SLOT_CAP Capability;\r
+ UINT32 BaseClkFreq;\r
+ UINT32 SettingFreq;\r
+ UINT32 Divisor;\r
+ UINT32 Remainder;\r
+ UINT16 ControllerVer;\r
+ UINT16 ClockCtrl;\r
\r
//\r
// Calculate a divisor for SD clock frequency\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
ASSERT (Capability.BaseClkFreq != 0);\r
\r
BaseClkFreq = Capability.BaseClkFreq;\r
if ((ClockFreq == SettingFreq) && (Remainder == 0)) {\r
break;\r
}\r
+\r
if ((ClockFreq == SettingFreq) && (Remainder != 0)) {\r
- SettingFreq ++;\r
+ SettingFreq++;\r
}\r
}\r
\r
- DEBUG ((EFI_D_INFO, "BaseClkFreq %dMHz Divisor %d ClockFreq %dKhz\n", BaseClkFreq, Divisor, ClockFreq));\r
+ DEBUG ((DEBUG_INFO, "BaseClkFreq %dMHz Divisor %d ClockFreq %dKhz\n", BaseClkFreq, Divisor, ClockFreq));\r
\r
Status = SdPeimHcRwMmio (Bar + SD_HC_CTRL_VER, TRUE, sizeof (ControllerVer), &ControllerVer);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
// Set SDCLK Frequency Select and Internal Clock Enable fields in Clock Control register.\r
//\r
if (((Divisor - 1) & Divisor) != 0) {\r
Divisor = 1 << (HighBitSet32 (Divisor) + 1);\r
}\r
+\r
ASSERT (Divisor <= 0x80);\r
ClockCtrl = (Divisor & 0xFF) << 8;\r
} else {\r
- DEBUG ((EFI_D_ERROR, "Unknown SD Host Controller Spec version [0x%x]!!!\n", ControllerVer));\r
+ DEBUG ((DEBUG_ERROR, "Unknown SD Host Controller Spec version [0x%x]!!!\n", ControllerVer));\r
return EFI_UNSUPPORTED;\r
}\r
\r
// Supply clock frequency with specified divisor\r
//\r
ClockCtrl |= BIT0;\r
- Status = SdPeimHcRwMmio (Bar + SD_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);\r
+ Status = SdPeimHcRwMmio (Bar + SD_HC_CLOCK_CTRL, FALSE, sizeof (ClockCtrl), &ClockCtrl);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "Set SDCLK Frequency Select and Internal Clock Enable fields fails\n"));\r
+ DEBUG ((DEBUG_ERROR, "Set SDCLK Frequency Select and Internal Clock Enable fields fails\n"));\r
return Status;\r
}\r
\r
// Set SD Clock Enable in the Clock Control register to 1\r
//\r
ClockCtrl = BIT2;\r
- Status = SdPeimHcOrMmio (Bar + SD_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);\r
+ Status = SdPeimHcOrMmio (Bar + SD_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);\r
\r
return Status;\r
}\r
**/\r
EFI_STATUS\r
SdPeimHcPowerControl (\r
- IN UINTN Bar,\r
- IN UINT8 PowerCtrl\r
+ IN UINTN Bar,\r
+ IN UINT8 PowerCtrl\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
//\r
// Clr SD Bus Power\r
//\r
- PowerCtrl &= (UINT8)~BIT0;\r
- Status = SdPeimHcRwMmio (Bar + SD_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);\r
+ PowerCtrl &= (UINT8) ~BIT0;\r
+ Status = SdPeimHcRwMmio (Bar + SD_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
// Set SD Bus Voltage Select and SD Bus Power fields in Power Control Register\r
//\r
PowerCtrl |= BIT0;\r
- Status = SdPeimHcRwMmio (Bar + SD_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);\r
+ Status = SdPeimHcRwMmio (Bar + SD_HC_POWER_CTRL, FALSE, sizeof (PowerCtrl), &PowerCtrl);\r
\r
return Status;\r
}\r
**/\r
EFI_STATUS\r
SdPeimHcSetBusWidth (\r
- IN UINTN Bar,\r
- IN UINT16 BusWidth\r
+ IN UINTN Bar,\r
+ IN UINT16 BusWidth\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT8 HostCtrl1;\r
+ EFI_STATUS Status;\r
+ UINT8 HostCtrl1;\r
\r
if (BusWidth == 1) {\r
- HostCtrl1 = (UINT8)~(BIT5 | BIT1);\r
- Status = SdPeimHcAndMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
+ HostCtrl1 = (UINT8) ~(BIT5 | BIT1);\r
+ Status = SdPeimHcAndMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
} else if (BusWidth == 4) {\r
Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
HostCtrl1 |= BIT1;\r
- HostCtrl1 &= (UINT8)~BIT5;\r
- Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);\r
+ HostCtrl1 &= (UINT8) ~BIT5;\r
+ Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);\r
} else if (BusWidth == 8) {\r
Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, TRUE, sizeof (HostCtrl1), &HostCtrl1);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- HostCtrl1 &= (UINT8)~BIT1;\r
+\r
+ HostCtrl1 &= (UINT8) ~BIT1;\r
HostCtrl1 |= BIT5;\r
- Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);\r
+ Status = SdPeimHcRwMmio (Bar + SD_HC_HOST_CTRL1, FALSE, sizeof (HostCtrl1), &HostCtrl1);\r
} else {\r
ASSERT (FALSE);\r
return EFI_INVALID_PARAMETER;\r
**/\r
EFI_STATUS\r
SdPeimHcInitClockFreq (\r
- IN UINTN Bar\r
+ IN UINTN Bar\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_HC_SLOT_CAP Capability;\r
- UINT32 InitFreq;\r
+ EFI_STATUS Status;\r
+ SD_HC_SLOT_CAP Capability;\r
+ UINT32 InitFreq;\r
\r
//\r
// Calculate a divisor for SD clock frequency\r
//\r
return EFI_UNSUPPORTED;\r
}\r
+\r
//\r
// Supply 400KHz clock frequency at initialization phase.\r
//\r
InitFreq = 400;\r
- Status = SdPeimHcClockSupply (Bar, InitFreq);\r
+ Status = SdPeimHcClockSupply (Bar, InitFreq);\r
return Status;\r
}\r
\r
**/\r
EFI_STATUS\r
SdPeimHcInitPowerVoltage (\r
- IN UINTN Bar\r
+ IN UINTN Bar\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_HC_SLOT_CAP Capability;\r
- UINT8 MaxVoltage;\r
- UINT8 HostCtrl2;\r
+ EFI_STATUS Status;\r
+ SD_HC_SLOT_CAP Capability;\r
+ UINT8 MaxVoltage;\r
+ UINT8 HostCtrl2;\r
\r
//\r
// Get the support voltage of the Host Controller\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
// Calculate supported maximum voltage according to SD Bus Voltage Select\r
//\r
//\r
MaxVoltage = 0x0A;\r
HostCtrl2 = BIT3;\r
- Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
+ Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
MicroSecondDelay (5000);\r
} else {\r
ASSERT (FALSE);\r
**/\r
EFI_STATUS\r
SdPeimHcInitTimeoutCtrl (\r
- IN UINTN Bar\r
+ IN UINTN Bar\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT8 Timeout;\r
+ EFI_STATUS Status;\r
+ UINT8 Timeout;\r
\r
Timeout = 0x0E;\r
Status = SdPeimHcRwMmio (Bar + SD_HC_TIMEOUT_CTRL, FALSE, sizeof (Timeout), &Timeout);\r
**/\r
EFI_STATUS\r
SdPeimHcInitHost (\r
- IN UINTN Bar\r
+ IN UINTN Bar\r
)\r
{\r
- EFI_STATUS Status;\r
+ EFI_STATUS Status;\r
\r
Status = SdPeimHcInitClockFreq (Bar);\r
if (EFI_ERROR (Status)) {\r
**/\r
EFI_STATUS\r
SdPeimHcLedOnOff (\r
- IN UINTN Bar,\r
- IN BOOLEAN On\r
+ IN UINTN Bar,\r
+ IN BOOLEAN On\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT8 HostCtrl1;\r
+ EFI_STATUS Status;\r
+ UINT8 HostCtrl1;\r
\r
if (On) {\r
HostCtrl1 = BIT0;\r
Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
} else {\r
- HostCtrl1 = (UINT8)~BIT0;\r
+ HostCtrl1 = (UINT8) ~BIT0;\r
Status = SdPeimHcAndMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
}\r
\r
**/\r
EFI_STATUS\r
BuildAdmaDescTable (\r
- IN SD_TRB *Trb\r
+ IN SD_TRB *Trb\r
)\r
{\r
- EFI_PHYSICAL_ADDRESS Data;\r
- UINT64 DataLen;\r
- UINT64 Entries;\r
- UINT32 Index;\r
- UINT64 Remaining;\r
- UINT32 Address;\r
-\r
- Data = (EFI_PHYSICAL_ADDRESS)(UINTN)Trb->Data;\r
+ EFI_PHYSICAL_ADDRESS Data;\r
+ UINT64 DataLen;\r
+ UINT64 Entries;\r
+ UINT32 Index;\r
+ UINT64 Remaining;\r
+ UINT32 Address;\r
+\r
+ Data = Trb->DataPhy;\r
DataLen = Trb->DataLen;\r
//\r
// Only support 32bit ADMA Descriptor Table\r
if ((Data >= 0x100000000ul) || ((Data + DataLen) > 0x100000000ul)) {\r
return EFI_INVALID_PARAMETER;\r
}\r
+\r
//\r
// Address field shall be set on 32-bit boundary (Lower 2-bit is always set to 0)\r
// for 32-bit address descriptor table.\r
//\r
if ((Data & (BIT0 | BIT1)) != 0) {\r
- DEBUG ((EFI_D_INFO, "The buffer [0x%x] to construct ADMA desc is not aligned to 4 bytes boundary!\n", Data));\r
+ DEBUG ((DEBUG_INFO, "The buffer [0x%x] to construct ADMA desc is not aligned to 4 bytes boundary!\n", Data));\r
}\r
\r
Entries = DivU64x32 ((DataLen + ADMA_MAX_DATA_PER_LINE - 1), ADMA_MAX_DATA_PER_LINE);\r
Address = (UINT32)Data;\r
for (Index = 0; Index < Entries; Index++) {\r
if (Remaining <= ADMA_MAX_DATA_PER_LINE) {\r
- Trb->AdmaDesc[Index].Valid = 1;\r
- Trb->AdmaDesc[Index].Act = 2;\r
+ Trb->AdmaDesc[Index].Valid = 1;\r
+ Trb->AdmaDesc[Index].Act = 2;\r
Trb->AdmaDesc[Index].Length = (UINT16)Remaining;\r
Trb->AdmaDesc[Index].Address = Address;\r
break;\r
} else {\r
- Trb->AdmaDesc[Index].Valid = 1;\r
- Trb->AdmaDesc[Index].Act = 2;\r
+ Trb->AdmaDesc[Index].Valid = 1;\r
+ Trb->AdmaDesc[Index].Act = 2;\r
Trb->AdmaDesc[Index].Length = 0;\r
Trb->AdmaDesc[Index].Address = Address;\r
}\r
**/\r
SD_TRB *\r
SdPeimCreateTrb (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN SD_COMMAND_PACKET *Packet\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN SD_COMMAND_PACKET *Packet\r
)\r
{\r
- SD_TRB *Trb;\r
- EFI_STATUS Status;\r
- SD_HC_SLOT_CAP Capability;\r
+ SD_TRB *Trb;\r
+ EFI_STATUS Status;\r
+ SD_HC_SLOT_CAP Capability;\r
+ EDKII_IOMMU_OPERATION MapOp;\r
+ UINTN MapLength;\r
\r
//\r
// Calculate a divisor for SD clock frequency\r
return NULL;\r
}\r
\r
- Trb = SdPeimAllocateMem (Slot->Private->Pool, sizeof (SD_TRB));\r
+ Trb = AllocateZeroPool (sizeof (SD_TRB));\r
if (Trb == NULL) {\r
return NULL;\r
}\r
goto Error;\r
}\r
\r
- if (Trb->DataLen < Trb->BlockSize) {\r
+ if ((Trb->DataLen != 0) && (Trb->DataLen < Trb->BlockSize)) {\r
Trb->BlockSize = (UINT16)Trb->DataLen;\r
}\r
\r
if (Packet->SdCmdBlk->CommandIndex == SD_SEND_TUNING_BLOCK) {\r
Trb->Mode = SdPioMode;\r
} else {\r
+ if (Trb->Read) {\r
+ MapOp = EdkiiIoMmuOperationBusMasterWrite;\r
+ } else {\r
+ MapOp = EdkiiIoMmuOperationBusMasterRead;\r
+ }\r
+\r
+ if (Trb->DataLen != 0) {\r
+ MapLength = Trb->DataLen;\r
+ Status = IoMmuMap (MapOp, Trb->Data, &MapLength, &Trb->DataPhy, &Trb->DataMap);\r
+\r
+ if (EFI_ERROR (Status) || (MapLength != Trb->DataLen)) {\r
+ DEBUG ((DEBUG_ERROR, "SdPeimCreateTrb: Fail to map data buffer.\n"));\r
+ goto Error;\r
+ }\r
+ }\r
+\r
if (Trb->DataLen == 0) {\r
Trb->Mode = SdNoData;\r
} else if (Capability.Adma2 != 0) {\r
Trb->Mode = SdAdmaMode;\r
- Status = BuildAdmaDescTable (Trb);\r
+ Status = BuildAdmaDescTable (Trb);\r
if (EFI_ERROR (Status)) {\r
goto Error;\r
}\r
Trb->Mode = SdPioMode;\r
}\r
}\r
+\r
return Trb;\r
\r
Error:\r
**/\r
VOID\r
SdPeimFreeTrb (\r
- IN SD_TRB *Trb\r
+ IN SD_TRB *Trb\r
)\r
{\r
+ if ((Trb != NULL) && (Trb->DataMap != NULL)) {\r
+ IoMmuUnmap (Trb->DataMap);\r
+ }\r
+\r
if ((Trb != NULL) && (Trb->AdmaDesc != NULL)) {\r
SdPeimFreeMem (Trb->Slot->Private->Pool, Trb->AdmaDesc, Trb->AdmaDescSize);\r
}\r
\r
if (Trb != NULL) {\r
- SdPeimFreeMem (Trb->Slot->Private->Pool, Trb, sizeof (SD_TRB));\r
+ FreePool (Trb);\r
}\r
+\r
return;\r
}\r
\r
**/\r
EFI_STATUS\r
SdPeimCheckTrbEnv (\r
- IN UINTN Bar,\r
- IN SD_TRB *Trb\r
+ IN UINTN Bar,\r
+ IN SD_TRB *Trb\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_COMMAND_PACKET *Packet;\r
- UINT32 PresentState;\r
+ EFI_STATUS Status;\r
+ SD_COMMAND_PACKET *Packet;\r
+ UINT32 PresentState;\r
\r
Packet = Trb->Packet;\r
\r
if ((Packet->SdCmdBlk->CommandType == SdCommandTypeAdtc) ||\r
(Packet->SdCmdBlk->ResponseType == SdResponseTypeR1b) ||\r
- (Packet->SdCmdBlk->ResponseType == SdResponseTypeR5b)) {\r
+ (Packet->SdCmdBlk->ResponseType == SdResponseTypeR5b))\r
+ {\r
//\r
// Wait Command Inhibit (CMD) and Command Inhibit (DAT) in\r
// the Present State register to be 0\r
**/\r
EFI_STATUS\r
SdPeimWaitTrbEnv (\r
- IN UINTN Bar,\r
- IN SD_TRB *Trb\r
+ IN UINTN Bar,\r
+ IN SD_TRB *Trb\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_COMMAND_PACKET *Packet;\r
- UINT64 Timeout;\r
- BOOLEAN InfiniteWait;\r
+ EFI_STATUS Status;\r
+ SD_COMMAND_PACKET *Packet;\r
+ UINT64 Timeout;\r
+ BOOLEAN InfiniteWait;\r
\r
//\r
// Wait Command Complete Interrupt Status bit in Normal Interrupt Status Register\r
if (Status != EFI_NOT_READY) {\r
return Status;\r
}\r
+\r
//\r
// Stall for 1 microsecond.\r
//\r
**/\r
EFI_STATUS\r
SdPeimExecTrb (\r
- IN UINTN Bar,\r
- IN SD_TRB *Trb\r
+ IN UINTN Bar,\r
+ IN SD_TRB *Trb\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_COMMAND_PACKET *Packet;\r
- UINT16 Cmd;\r
- UINT16 IntStatus;\r
- UINT32 Argument;\r
- UINT16 BlkCount;\r
- UINT16 BlkSize;\r
- UINT16 TransMode;\r
- UINT8 HostCtrl1;\r
- UINT32 SdmaAddr;\r
- UINT64 AdmaAddr;\r
+ EFI_STATUS Status;\r
+ SD_COMMAND_PACKET *Packet;\r
+ UINT16 Cmd;\r
+ UINT16 IntStatus;\r
+ UINT32 Argument;\r
+ UINT16 BlkCount;\r
+ UINT16 BlkSize;\r
+ UINT16 TransMode;\r
+ UINT8 HostCtrl1;\r
+ UINT32 SdmaAddr;\r
+ UINT64 AdmaAddr;\r
\r
Packet = Trb->Packet;\r
//\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
// Clear all bits in Normal Interrupt Status Register\r
//\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
// Set Host Control 1 register DMA Select field\r
//\r
if (Trb->Mode == SdAdmaMode) {\r
HostCtrl1 = BIT4;\r
- Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
+ Status = SdPeimHcOrMmio (Bar + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
SdPeimHcLedOnOff (Bar, TRUE);\r
\r
if (Trb->Mode == SdSdmaMode) {\r
- if ((UINT64)(UINTN)Trb->Data >= 0x100000000ul) {\r
+ if ((UINT64)(UINTN)Trb->DataPhy >= 0x100000000ul) {\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- SdmaAddr = (UINT32)(UINTN)Trb->Data;\r
+ SdmaAddr = (UINT32)(UINTN)Trb->DataPhy;\r
Status = SdPeimHcRwMmio (Bar + SD_HC_SDMA_ADDR, FALSE, sizeof (SdmaAddr), &SdmaAddr);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
BlkCount = 0;\r
if (Trb->Mode != SdNoData) {\r
//\r
- // Calcuate Block Count.\r
+ // Calculate Block Count.\r
//\r
BlkCount = (UINT16)(Trb->DataLen / Trb->BlockSize);\r
}\r
- Status = SdPeimHcRwMmio (Bar + SD_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);\r
+\r
+ Status = SdPeimHcRwMmio (Bar + SD_HC_BLK_COUNT, FALSE, sizeof (BlkCount), &BlkCount);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
if (Trb->Mode != SdPioMode) {\r
TransMode |= BIT0;\r
}\r
+\r
if (Trb->Read) {\r
TransMode |= BIT4;\r
}\r
+\r
if (BlkCount > 1) {\r
TransMode |= BIT5 | BIT1;\r
}\r
+\r
//\r
// SD memory card needs to use AUTO CMD12 feature.\r
//\r
return Status;\r
}\r
\r
- Cmd = (UINT16)LShiftU64(Packet->SdCmdBlk->CommandIndex, 8);\r
+ Cmd = (UINT16)LShiftU64 (Packet->SdCmdBlk->CommandIndex, 8);\r
if (Packet->SdCmdBlk->CommandType == SdCommandTypeAdtc) {\r
Cmd |= BIT5;\r
}\r
+\r
//\r
// Convert ResponseType to value\r
//\r
break;\r
case SdResponseTypeR2:\r
Cmd |= (BIT0 | BIT3);\r
- break;\r
+ break;\r
case SdResponseTypeR3:\r
case SdResponseTypeR4:\r
Cmd |= BIT1;\r
break;\r
}\r
}\r
+\r
//\r
// Execute cmd\r
//\r
**/\r
EFI_STATUS\r
SdPeimCheckTrbResult (\r
- IN UINTN Bar,\r
- IN SD_TRB *Trb\r
+ IN UINTN Bar,\r
+ IN SD_TRB *Trb\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_COMMAND_PACKET *Packet;\r
- UINT16 IntStatus;\r
- UINT32 Response[4];\r
- UINT32 SdmaAddr;\r
- UINT8 Index;\r
- UINT8 SwReset;\r
- UINT32 PioLength;\r
+ EFI_STATUS Status;\r
+ SD_COMMAND_PACKET *Packet;\r
+ UINT16 IntStatus;\r
+ UINT32 Response[4];\r
+ UINT32 SdmaAddr;\r
+ UINT8 Index;\r
+ UINT8 SwReset;\r
+ UINT32 PioLength;\r
\r
SwReset = 0;\r
Packet = Trb->Packet;\r
if (EFI_ERROR (Status)) {\r
goto Done;\r
}\r
+\r
//\r
// Check Transfer Complete bit is set or not.\r
//\r
\r
goto Done;\r
}\r
+\r
//\r
// Check if there is a error happened during cmd execution.\r
// If yes, then do error recovery procedure to follow SD Host Controller\r
if ((IntStatus & 0x0F) != 0) {\r
SwReset |= BIT1;\r
}\r
+\r
if ((IntStatus & 0xF0) != 0) {\r
SwReset |= BIT2;\r
}\r
if (EFI_ERROR (Status)) {\r
goto Done;\r
}\r
+\r
Status = SdPeimHcWaitMmioSet (\r
Bar + SD_HC_SW_RST,\r
sizeof (SwReset),\r
Status = EFI_DEVICE_ERROR;\r
goto Done;\r
}\r
+\r
//\r
// Check if DMA interrupt is signalled for the SDMA transfer.\r
//\r
if (EFI_ERROR (Status)) {\r
goto Done;\r
}\r
+\r
//\r
// Update SDMA Address register.\r
//\r
- SdmaAddr = SD_SDMA_ROUND_UP ((UINT32)(UINTN)Trb->Data, SD_SDMA_BOUNDARY);\r
+ SdmaAddr = SD_SDMA_ROUND_UP ((UINT32)(UINTN)Trb->DataPhy, SD_SDMA_BOUNDARY);\r
Status = SdPeimHcRwMmio (\r
Bar + SD_HC_SDMA_ADDR,\r
FALSE,\r
if (EFI_ERROR (Status)) {\r
goto Done;\r
}\r
- Trb->Data = (VOID*)(UINTN)SdmaAddr;\r
+\r
+ Trb->DataPhy = (UINT32)(UINTN)SdmaAddr;\r
}\r
\r
if ((Packet->SdCmdBlk->CommandType != SdCommandTypeAdtc) &&\r
(Packet->SdCmdBlk->ResponseType != SdResponseTypeR1b) &&\r
- (Packet->SdCmdBlk->ResponseType != SdResponseTypeR5b)) {\r
+ (Packet->SdCmdBlk->ResponseType != SdResponseTypeR5b))\r
+ {\r
if ((IntStatus & BIT0) == BIT0) {\r
Status = EFI_SUCCESS;\r
goto Done;\r
// Read data out from Buffer Port register\r
//\r
for (PioLength = 0; PioLength < Trb->DataLen; PioLength += 4) {\r
- SdPeimHcRwMmio (Bar + SD_HC_BUF_DAT_PORT, TRUE, 4, (UINT8*)Trb->Data + PioLength);\r
+ SdPeimHcRwMmio (Bar + SD_HC_BUF_DAT_PORT, TRUE, 4, (UINT8 *)Trb->Data + PioLength);\r
}\r
+\r
Status = EFI_SUCCESS;\r
goto Done;\r
}\r
return Status;\r
}\r
}\r
+\r
CopyMem (Packet->SdStatusBlk, Response, sizeof (Response));\r
}\r
}\r
**/\r
EFI_STATUS\r
SdPeimWaitTrbResult (\r
- IN UINTN Bar,\r
- IN SD_TRB *Trb\r
+ IN UINTN Bar,\r
+ IN SD_TRB *Trb\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_COMMAND_PACKET *Packet;\r
- UINT64 Timeout;\r
- BOOLEAN InfiniteWait;\r
+ EFI_STATUS Status;\r
+ SD_COMMAND_PACKET *Packet;\r
+ UINT64 Timeout;\r
+ BOOLEAN InfiniteWait;\r
\r
Packet = Trb->Packet;\r
//\r
if (Status != EFI_NOT_READY) {\r
return Status;\r
}\r
+\r
//\r
// Stall for 1 microsecond.\r
//\r
EFI_STATUS\r
EFIAPI\r
SdPeimExecCmd (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN OUT SD_COMMAND_PACKET *Packet\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN OUT SD_COMMAND_PACKET *Packet\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_TRB *Trb;\r
+ EFI_STATUS Status;\r
+ SD_TRB *Trb;\r
\r
if (Packet == NULL) {\r
return EFI_INVALID_PARAMETER;\r
**/\r
EFI_STATUS\r
SdPeimReset (\r
- IN SD_PEIM_HC_SLOT *Slot\r
+ IN SD_PEIM_HC_SLOT *Slot\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
Packet.SdStatusBlk = &SdStatusBlk;\r
Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_GO_IDLE_STATE;\r
- SdCmdBlk.CommandType = SdCommandTypeBc;\r
- SdCmdBlk.ResponseType = 0;\r
+ SdCmdBlk.CommandIndex = SD_GO_IDLE_STATE;\r
+ SdCmdBlk.CommandType = SdCommandTypeBc;\r
+ SdCmdBlk.ResponseType = 0;\r
SdCmdBlk.CommandArgument = 0;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
**/\r
EFI_STATUS\r
SdPeimVoltageCheck (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT8 SupplyVoltage,\r
- IN UINT8 CheckPattern\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT8 SupplyVoltage,\r
+ IN UINT8 CheckPattern\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
Packet.SdStatusBlk = &SdStatusBlk;\r
Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_SEND_IF_COND;\r
- SdCmdBlk.CommandType = SdCommandTypeBcr;\r
- SdCmdBlk.ResponseType = SdResponseTypeR7;\r
+ SdCmdBlk.CommandIndex = SD_SEND_IF_COND;\r
+ SdCmdBlk.CommandType = SdCommandTypeBcr;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR7;\r
SdCmdBlk.CommandArgument = (SupplyVoltage << 8) | CheckPattern;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
**/\r
EFI_STATUS\r
SdioSendOpCond (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT32 VoltageWindow,\r
- IN BOOLEAN S18r\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT32 VoltageWindow,\r
+ IN BOOLEAN S18r\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
- UINT32 Switch;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
+ UINT32 Switch;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
**/\r
EFI_STATUS\r
SdPeimSendOpCond (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT16 Rca,\r
- IN UINT32 VoltageWindow,\r
- IN BOOLEAN S18r,\r
- IN BOOLEAN Xpc,\r
- IN BOOLEAN Hcs,\r
- OUT UINT32 *Ocr\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT16 Rca,\r
+ IN UINT32 VoltageWindow,\r
+ IN BOOLEAN S18r,\r
+ IN BOOLEAN Xpc,\r
+ IN BOOLEAN Hcs,\r
+ OUT UINT32 *Ocr\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
- UINT32 Switch;\r
- UINT32 MaxPower;\r
- UINT32 HostCapacity;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
+ UINT32 Switch;\r
+ UINT32 MaxPower;\r
+ UINT32 HostCapacity;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
Packet.SdStatusBlk = &SdStatusBlk;\r
Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_APP_CMD;\r
- SdCmdBlk.CommandType = SdCommandTypeAc;\r
- SdCmdBlk.ResponseType = SdResponseTypeR1;\r
+ SdCmdBlk.CommandIndex = SD_APP_CMD;\r
+ SdCmdBlk.CommandType = SdCommandTypeAc;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR1;\r
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
SdCmdBlk.CommandType = SdCommandTypeBcr;\r
SdCmdBlk.ResponseType = SdResponseTypeR3;\r
\r
- Switch = S18r ? BIT24 : 0;\r
- MaxPower = Xpc ? BIT28 : 0;\r
- HostCapacity = Hcs ? BIT30 : 0;\r
+ Switch = S18r ? BIT24 : 0;\r
+ MaxPower = Xpc ? BIT28 : 0;\r
+ HostCapacity = Hcs ? BIT30 : 0;\r
SdCmdBlk.CommandArgument = (VoltageWindow & 0xFFFFFF) | Switch | MaxPower | HostCapacity;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
**/\r
EFI_STATUS\r
SdPeimAllSendCid (\r
- IN SD_PEIM_HC_SLOT *Slot\r
+ IN SD_PEIM_HC_SLOT *Slot\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
\r
Packet.SdCmdBlk = &SdCmdBlk;\r
Packet.SdStatusBlk = &SdStatusBlk;\r
- Packet.Timeout = SD_TIMEOUT;\r
+ Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_ALL_SEND_CID;\r
- SdCmdBlk.CommandType = SdCommandTypeBcr;\r
- SdCmdBlk.ResponseType = SdResponseTypeR2;\r
+ SdCmdBlk.CommandIndex = SD_ALL_SEND_CID;\r
+ SdCmdBlk.CommandType = SdCommandTypeBcr;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR2;\r
SdCmdBlk.CommandArgument = 0;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
**/\r
EFI_STATUS\r
SdPeimSetRca (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- OUT UINT16 *Rca\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ OUT UINT16 *Rca\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
\r
Packet.SdCmdBlk = &SdCmdBlk;\r
Packet.SdStatusBlk = &SdStatusBlk;\r
- Packet.Timeout = SD_TIMEOUT;\r
+ Packet.Timeout = SD_TIMEOUT;\r
\r
SdCmdBlk.CommandIndex = SD_SET_RELATIVE_ADDR;\r
SdCmdBlk.CommandType = SdCommandTypeBcr;\r
**/\r
EFI_STATUS\r
SdPeimGetCsd (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT16 Rca,\r
- OUT SD_CSD *Csd\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT16 Rca,\r
+ OUT SD_CSD *Csd\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
\r
Packet.SdCmdBlk = &SdCmdBlk;\r
Packet.SdStatusBlk = &SdStatusBlk;\r
- Packet.Timeout = SD_TIMEOUT;\r
+ Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_SEND_CSD;\r
- SdCmdBlk.CommandType = SdCommandTypeAc;\r
- SdCmdBlk.ResponseType = SdResponseTypeR2;\r
+ SdCmdBlk.CommandIndex = SD_SEND_CSD;\r
+ SdCmdBlk.CommandType = SdCommandTypeAc;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR2;\r
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
//\r
// For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.\r
//\r
- CopyMem (((UINT8*)Csd) + 1, &SdStatusBlk.Resp0, sizeof (SD_CSD) - 1);\r
+ CopyMem (((UINT8 *)Csd) + 1, &SdStatusBlk.Resp0, sizeof (SD_CSD) - 1);\r
}\r
\r
return Status;\r
**/\r
EFI_STATUS\r
SdPeimSelect (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT16 Rca\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT16 Rca\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
\r
Packet.SdCmdBlk = &SdCmdBlk;\r
Packet.SdStatusBlk = &SdStatusBlk;\r
- Packet.Timeout = SD_TIMEOUT;\r
+ Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_SELECT_DESELECT_CARD;\r
- SdCmdBlk.CommandType = SdCommandTypeAc;\r
- SdCmdBlk.ResponseType = SdResponseTypeR1b;\r
+ SdCmdBlk.CommandIndex = SD_SELECT_DESELECT_CARD;\r
+ SdCmdBlk.CommandType = SdCommandTypeAc;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR1b;\r
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
**/\r
EFI_STATUS\r
SdPeimVoltageSwitch (\r
- IN SD_PEIM_HC_SLOT *Slot\r
+ IN SD_PEIM_HC_SLOT *Slot\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
\r
Packet.SdCmdBlk = &SdCmdBlk;\r
Packet.SdStatusBlk = &SdStatusBlk;\r
- Packet.Timeout = SD_TIMEOUT;\r
+ Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_VOLTAGE_SWITCH;\r
- SdCmdBlk.CommandType = SdCommandTypeAc;\r
- SdCmdBlk.ResponseType = SdResponseTypeR1;\r
+ SdCmdBlk.CommandIndex = SD_VOLTAGE_SWITCH;\r
+ SdCmdBlk.CommandType = SdCommandTypeAc;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR1;\r
SdCmdBlk.CommandArgument = 0;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
**/\r
EFI_STATUS\r
SdPeimSetBusWidth (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT16 Rca,\r
- IN UINT8 BusWidth\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT16 Rca,\r
+ IN UINT8 BusWidth\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
- UINT8 Value;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
+ UINT8 Value;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
Packet.SdStatusBlk = &SdStatusBlk;\r
Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_APP_CMD;\r
- SdCmdBlk.CommandType = SdCommandTypeAc;\r
- SdCmdBlk.ResponseType = SdResponseTypeR1;\r
+ SdCmdBlk.CommandIndex = SD_APP_CMD;\r
+ SdCmdBlk.CommandType = SdCommandTypeAc;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR1;\r
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
} else {\r
return EFI_INVALID_PARAMETER;\r
}\r
+\r
SdCmdBlk.CommandArgument = Value & 0x3;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
@param[in] DriveStrength The value for drive length group.\r
@param[in] PowerLimit The value for power limit group.\r
@param[in] Mode Switch or check function.\r
+ @param[out] SwitchResp The return switch function status.\r
\r
@retval EFI_SUCCESS The operation is done correctly.\r
@retval Others The operation fails.\r
**/\r
EFI_STATUS\r
SdPeimSwitch (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT8 AccessMode,\r
- IN UINT8 CommandSystem,\r
- IN UINT8 DriveStrength,\r
- IN UINT8 PowerLimit,\r
- IN BOOLEAN Mode\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT8 AccessMode,\r
+ IN UINT8 CommandSystem,\r
+ IN UINT8 DriveStrength,\r
+ IN UINT8 PowerLimit,\r
+ IN BOOLEAN Mode,\r
+ OUT UINT8 *SwitchResp\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
- UINT32 ModeValue;\r
- UINT8 Data[64];\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
+ UINT32 ModeValue;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
\r
Packet.SdCmdBlk = &SdCmdBlk;\r
Packet.SdStatusBlk = &SdStatusBlk;\r
- Packet.Timeout = SD_TIMEOUT;\r
+ Packet.Timeout = SD_TIMEOUT;\r
\r
SdCmdBlk.CommandIndex = SD_SWITCH_FUNC;\r
SdCmdBlk.CommandType = SdCommandTypeAdtc;\r
SdCmdBlk.ResponseType = SdResponseTypeR1;\r
\r
- ModeValue = Mode ? BIT31 : 0;\r
+ ModeValue = Mode ? BIT31 : 0;\r
SdCmdBlk.CommandArgument = (AccessMode & 0xF) | ((PowerLimit & 0xF) << 4) | \\r
((DriveStrength & 0xF) << 8) | ((DriveStrength & 0xF) << 12) | \\r
ModeValue;\r
- Packet.InDataBuffer = Data;\r
- Packet.InTransferLength = sizeof (Data);\r
+ Packet.InDataBuffer = SwitchResp;\r
+ Packet.InTransferLength = 64;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
\r
**/\r
EFI_STATUS\r
SdPeimSendStatus (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT16 Rca,\r
- OUT UINT32 *DevStatus\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT16 Rca,\r
+ OUT UINT32 *DevStatus\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
Packet.SdStatusBlk = &SdStatusBlk;\r
Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_SEND_STATUS;\r
- SdCmdBlk.CommandType = SdCommandTypeAc;\r
- SdCmdBlk.ResponseType = SdResponseTypeR1;\r
+ SdCmdBlk.CommandIndex = SD_SEND_STATUS;\r
+ SdCmdBlk.CommandType = SdCommandTypeAc;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR1;\r
SdCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
\r
Status = SdPeimExecCmd (Slot, &Packet);\r
**/\r
EFI_STATUS\r
SdPeimRwSingleBlock (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN EFI_LBA Lba,\r
- IN UINT32 BlockSize,\r
- IN VOID *Buffer,\r
- IN UINTN BufferSize,\r
- IN BOOLEAN IsRead\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN EFI_LBA Lba,\r
+ IN UINT32 BlockSize,\r
+ IN VOID *Buffer,\r
+ IN UINTN BufferSize,\r
+ IN BOOLEAN IsRead\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
// Taking 2MB/s as divisor is because it's the lowest\r
// transfer speed of class 2.\r
//\r
- Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;;\r
+ Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;\r
\r
if (IsRead) {\r
Packet.InDataBuffer = Buffer;\r
**/\r
EFI_STATUS\r
SdPeimRwMultiBlocks (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN EFI_LBA Lba,\r
- IN UINT32 BlockSize,\r
- IN VOID *Buffer,\r
- IN UINTN BufferSize,\r
- IN BOOLEAN IsRead\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN EFI_LBA Lba,\r
+ IN UINT32 BlockSize,\r
+ IN VOID *Buffer,\r
+ IN UINTN BufferSize,\r
+ IN BOOLEAN IsRead\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
// Taking 2MB/s as divisor is because it's the lowest\r
// transfer speed of class 2.\r
//\r
- Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;;\r
+ Packet.Timeout = (BufferSize / (2 * 1024 * 1024) + 1) * 1000 * 1000;\r
\r
if (IsRead) {\r
Packet.InDataBuffer = Buffer;\r
**/\r
EFI_STATUS\r
SdPeimSendTuningBlk (\r
- IN SD_PEIM_HC_SLOT *Slot\r
+ IN SD_PEIM_HC_SLOT *Slot\r
)\r
{\r
- SD_COMMAND_BLOCK SdCmdBlk;\r
- SD_STATUS_BLOCK SdStatusBlk;\r
- SD_COMMAND_PACKET Packet;\r
- EFI_STATUS Status;\r
- UINT8 TuningBlock[64];\r
+ SD_COMMAND_BLOCK SdCmdBlk;\r
+ SD_STATUS_BLOCK SdStatusBlk;\r
+ SD_COMMAND_PACKET Packet;\r
+ EFI_STATUS Status;\r
+ UINT8 TuningBlock[64];\r
\r
ZeroMem (&SdCmdBlk, sizeof (SdCmdBlk));\r
ZeroMem (&SdStatusBlk, sizeof (SdStatusBlk));\r
Packet.SdStatusBlk = &SdStatusBlk;\r
Packet.Timeout = SD_TIMEOUT;\r
\r
- SdCmdBlk.CommandIndex = SD_SEND_TUNING_BLOCK;\r
- SdCmdBlk.CommandType = SdCommandTypeAdtc;\r
- SdCmdBlk.ResponseType = SdResponseTypeR1;\r
+ SdCmdBlk.CommandIndex = SD_SEND_TUNING_BLOCK;\r
+ SdCmdBlk.CommandType = SdCommandTypeAdtc;\r
+ SdCmdBlk.ResponseType = SdResponseTypeR1;\r
SdCmdBlk.CommandArgument = 0;\r
\r
Packet.InDataBuffer = TuningBlock;\r
}\r
\r
/**\r
- Tunning the sampling point of SDR104 or SDR50 bus speed mode.\r
+ Tuning the sampling point of SDR104 or SDR50 bus speed mode.\r
\r
Command SD_SEND_TUNING_BLOCK may be sent up to 40 times until the host finishes the\r
tuning procedure.\r
**/\r
EFI_STATUS\r
SdPeimTuningClock (\r
- IN SD_PEIM_HC_SLOT *Slot\r
+ IN SD_PEIM_HC_SLOT *Slot\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT8 HostCtrl2;\r
- UINT8 Retry;\r
+ EFI_STATUS Status;\r
+ UINT8 HostCtrl2;\r
+ UINT8 Retry;\r
\r
//\r
// Notify the host that the sampling clock tuning procedure starts.\r
//\r
HostCtrl2 = BIT6;\r
- Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
+ Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
// Ask the device to send a sequence of tuning blocks till the tuning procedure is done.\r
//\r
return Status;\r
}\r
\r
- if ((HostCtrl2 & (BIT6 | BIT7)) == BIT7) {\r
+ if ((HostCtrl2 & (BIT6 | BIT7)) == 0) {\r
break;\r
}\r
+\r
+ if ((HostCtrl2 & (BIT6 | BIT7)) == BIT7) {\r
+ return EFI_SUCCESS;\r
+ }\r
} while (++Retry < 40);\r
\r
- if (Retry == 40) {\r
- Status = EFI_TIMEOUT;\r
+ DEBUG ((DEBUG_ERROR, "SdPeimTuningClock: Send tuning block fails at %d times with HostCtrl2 %02x\n", Retry, HostCtrl2));\r
+ //\r
+ // Abort the tuning procedure and reset the tuning circuit.\r
+ //\r
+ HostCtrl2 = (UINT8) ~(BIT6 | BIT7);\r
+ Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
}\r
- return Status;\r
+\r
+ return EFI_DEVICE_ERROR;\r
}\r
\r
/**\r
**/\r
EFI_STATUS\r
SdPeimSwitchBusWidth (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT16 Rca,\r
- IN UINT8 BusWidth\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT16 Rca,\r
+ IN UINT8 BusWidth\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 DevStatus;\r
+ EFI_STATUS Status;\r
+ UINT32 DevStatus;\r
\r
Status = SdPeimSetBusWidth (Slot, Rca, BusWidth);\r
if (EFI_ERROR (Status)) {\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
//\r
// Check the switch operation is really successful or not.\r
//\r
**/\r
EFI_STATUS\r
SdPeimSetBusMode (\r
- IN SD_PEIM_HC_SLOT *Slot,\r
- IN UINT16 Rca,\r
- IN BOOLEAN S18a\r
+ IN SD_PEIM_HC_SLOT *Slot,\r
+ IN UINT16 Rca,\r
+ IN BOOLEAN S18a\r
)\r
{\r
- EFI_STATUS Status;\r
- SD_HC_SLOT_CAP Capability;\r
- UINT32 ClockFreq;\r
- UINT8 BusWidth;\r
- UINT8 AccessMode;\r
- UINT8 HostCtrl1;\r
- UINT8 HostCtrl2;\r
+ EFI_STATUS Status;\r
+ SD_HC_SLOT_CAP Capability;\r
+ UINT32 ClockFreq;\r
+ UINT8 BusWidth;\r
+ UINT8 AccessMode;\r
+ UINT8 HostCtrl1;\r
+ UINT8 HostCtrl2;\r
+ UINT8 SwitchResp[64];\r
\r
Status = SdPeimGetCsd (Slot, Rca, &Slot->Csd);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimSetBusMode: SdPeimGetCsd fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimGetCsd fails with %r\n", Status));\r
return Status;\r
}\r
\r
\r
Status = SdPeimSelect (Slot, Rca);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimSetBusMode: SdPeimSelect fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimSelect fails with %r\n", Status));\r
return Status;\r
}\r
\r
BusWidth = 4;\r
- Status = SdPeimSwitchBusWidth (Slot, Rca, BusWidth);\r
+ Status = SdPeimSwitchBusWidth (Slot, Rca, BusWidth);\r
+ if (EFI_ERROR (Status)) {\r
+ DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimSwitchBusWidth fails with %r\n", Status));\r
+ return Status;\r
+ }\r
+\r
+ //\r
+ // Get the supported bus speed from SWITCH cmd return data group #1.\r
+ //\r
+ ZeroMem (SwitchResp, sizeof (SwitchResp));\r
+ Status = SdPeimSwitch (Slot, 0xF, 0xF, 0xF, 0xF, FALSE, SwitchResp);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimSetBusMode: SdPeimSwitchBusWidth fails with %r\n", Status));\r
return Status;\r
}\r
\r
//\r
- // Calculate supported bus speed/bus width/clock frequency.\r
+ // Calculate supported bus speed/bus width/clock frequency by host and device capability.\r
//\r
ClockFreq = 0;\r
- if (S18a && (Capability.Sdr104 != 0)) {\r
- ClockFreq = 208;\r
+ if (S18a && (Capability.Sdr104 != 0) && ((SwitchResp[13] & BIT3) != 0)) {\r
+ ClockFreq = 208;\r
AccessMode = 3;\r
- } else if (S18a && (Capability.Sdr50 != 0)) {\r
- ClockFreq = 100;\r
+ } else if (S18a && (Capability.Sdr50 != 0) && ((SwitchResp[13] & BIT2) != 0)) {\r
+ ClockFreq = 100;\r
AccessMode = 2;\r
- } else if (S18a && (Capability.Ddr50 != 0)) {\r
- ClockFreq = 50;\r
+ } else if (S18a && (Capability.Ddr50 != 0) && ((SwitchResp[13] & BIT4) != 0)) {\r
+ ClockFreq = 50;\r
AccessMode = 4;\r
- } else {\r
- ClockFreq = 50;\r
+ } else if ((SwitchResp[13] & BIT1) != 0) {\r
+ ClockFreq = 50;\r
AccessMode = 1;\r
+ } else {\r
+ ClockFreq = 25;\r
+ AccessMode = 0;\r
}\r
\r
- DEBUG ((EFI_D_INFO, "AccessMode %d ClockFreq %d BusWidth %d\n", AccessMode, ClockFreq, BusWidth));\r
+ DEBUG ((DEBUG_INFO, "SdPeimSetBusMode: AccessMode %d ClockFreq %d BusWidth %d\n", AccessMode, ClockFreq, BusWidth));\r
\r
- Status = SdPeimSwitch (Slot, AccessMode, 0, 0, 0, TRUE);\r
+ Status = SdPeimSwitch (Slot, AccessMode, 0xF, 0xF, 0xF, TRUE, SwitchResp);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimSetBusMode: SdPeimSwitch fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimSwitch fails with %r\n", Status));\r
return Status;\r
}\r
\r
+ if ((SwitchResp[16] & 0xF) != AccessMode) {\r
+ DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimSwitch to AccessMode %d ClockFreq %d BusWidth %d fails! The Switch response is 0x%1x\n", AccessMode, ClockFreq, BusWidth, SwitchResp[16] & 0xF));\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
//\r
- // Set to Hight Speed timing\r
+ // Set to High Speed timing\r
//\r
if (AccessMode == 1) {\r
HostCtrl1 = BIT2;\r
- Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
+ Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
}\r
\r
- HostCtrl2 = (UINT8)~0x7;\r
- Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
+ HostCtrl2 = (UINT8) ~0x7;\r
+ Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
+\r
HostCtrl2 = AccessMode;\r
- Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
+ Status = SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
Status = SdPeimHcClockSupply (Slot->SdHcBase, ClockFreq * 1000);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimSetBusMode: SdPeimHcClockSupply %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimHcClockSupply %r\n", Status));\r
return Status;\r
}\r
\r
if ((AccessMode == 3) || ((AccessMode == 2) && (Capability.TuningSDR50 != 0))) {\r
Status = SdPeimTuningClock (Slot);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimSetBusMode: SdPeimTuningClock fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimSetBusMode: SdPeimTuningClock fails with %r\n", Status));\r
return Status;\r
}\r
}\r
\r
- DEBUG ((EFI_D_INFO, "SdPeimSetBusMode: SdPeimSetBusMode %r\n", Status));\r
+ DEBUG ((DEBUG_INFO, "SdPeimSetBusMode: SdPeimSetBusMode %r\n", Status));\r
\r
return Status;\r
}\r
**/\r
EFI_STATUS\r
SdPeimIdentification (\r
- IN SD_PEIM_HC_SLOT *Slot\r
+ IN SD_PEIM_HC_SLOT *Slot\r
)\r
{\r
- EFI_STATUS Status;\r
- UINT32 Ocr;\r
- UINT16 Rca;\r
- BOOLEAN Xpc;\r
- BOOLEAN S18r;\r
- UINT64 MaxCurrent;\r
- UINT64 Current;\r
- UINT16 ControllerVer;\r
- UINT8 PowerCtrl;\r
- UINT32 PresentState;\r
- UINT8 HostCtrl2;\r
- SD_HC_SLOT_CAP Capability;\r
+ EFI_STATUS Status;\r
+ UINT32 Ocr;\r
+ UINT16 Rca;\r
+ BOOLEAN Xpc;\r
+ BOOLEAN S18r;\r
+ UINT64 MaxCurrent;\r
+ UINT64 Current;\r
+ UINT16 ControllerVer;\r
+ UINT8 PowerCtrl;\r
+ UINT32 PresentState;\r
+ UINT8 HostCtrl2;\r
+ SD_HC_SLOT_CAP Capability;\r
+ UINTN Retry;\r
\r
//\r
// 1. Send Cmd0 to the device\r
//\r
Status = SdPeimReset (Slot);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: Executing Cmd0 fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing Cmd0 fails with %r\n", Status));\r
return Status;\r
}\r
+\r
//\r
// 2. Send Cmd8 to the device\r
//\r
Status = SdPeimVoltageCheck (Slot, 0x1, 0xFF);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: Executing Cmd8 fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing Cmd8 fails with %r\n", Status));\r
return Status;\r
}\r
+\r
//\r
// 3. Send SDIO Cmd5 to the device to the SDIO device OCR register.\r
//\r
Status = SdioSendOpCond (Slot, 0, FALSE);\r
if (!EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: Found SDIO device, ignore it as we don't support\n"));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Found SDIO device, ignore it as we don't support\n"));\r
return EFI_DEVICE_ERROR;\r
}\r
+\r
//\r
// 4. Send Acmd41 with voltage window 0 to the device\r
//\r
Status = SdPeimSendOpCond (Slot, 0, 0, FALSE, FALSE, FALSE, &Ocr);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: Executing SdPeimSendOpCond fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing SdPeimSendOpCond fails with %r\n", Status));\r
return EFI_DEVICE_ERROR;\r
}\r
\r
ASSERT (FALSE);\r
return EFI_UNSUPPORTED;\r
}\r
+\r
//\r
// 5. Repeatly send Acmd41 with supply voltage window to the device.\r
// Note here we only support the cards complied with SD physical\r
// layer simplified spec version 2.0 and version 3.0 and above.\r
//\r
+ Ocr = 0;\r
+ Retry = 0;\r
do {\r
Status = SdPeimSendOpCond (Slot, 0, Ocr, S18r, Xpc, TRUE, &Ocr);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: SdPeimSendOpCond fails with %r Ocr %x, S18r %x, Xpc %x\n", Status, Ocr, S18r, Xpc));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: SdPeimSendOpCond fails with %r Ocr %x, S18r %x, Xpc %x\n", Status, Ocr, S18r, Xpc));\r
return EFI_DEVICE_ERROR;\r
}\r
+\r
+ if (Retry++ == 100) {\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: SdPeimSendOpCond fails too many times\n"));\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ MicroSecondDelay (10 * 1000);\r
} while ((Ocr & BIT31) == 0);\r
\r
//\r
// (One of support bits is set to 1: SDR50, SDR104 or DDR50 in the\r
// Capabilities register), switch its voltage to 1.8V.\r
//\r
- if ((Capability.Sdr50 != 0 ||\r
- Capability.Sdr104 != 0 ||\r
- Capability.Ddr50 != 0) &&\r
- ((Ocr & BIT24) != 0)) {\r
+ if (((Capability.Sdr50 != 0) ||\r
+ (Capability.Sdr104 != 0) ||\r
+ (Capability.Ddr50 != 0)) &&\r
+ ((Ocr & BIT24) != 0))\r
+ {\r
Status = SdPeimVoltageSwitch (Slot);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: Executing SdPeimVoltageSwitch fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing SdPeimVoltageSwitch fails with %r\n", Status));\r
Status = EFI_DEVICE_ERROR;\r
goto Error;\r
} else {\r
\r
SdPeimHcRwMmio (Slot->SdHcBase + SD_HC_PRESENT_STATE, TRUE, sizeof (PresentState), &PresentState);\r
if (((PresentState >> 20) & 0xF) != 0) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: SwitchVoltage fails with PresentState = 0x%x\n", PresentState));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: SwitchVoltage fails with PresentState = 0x%x\n", PresentState));\r
Status = EFI_DEVICE_ERROR;\r
goto Error;\r
}\r
- HostCtrl2 = BIT3;\r
+\r
+ HostCtrl2 = BIT3;\r
SdPeimHcOrMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
\r
MicroSecondDelay (5000);\r
\r
SdPeimHcRwMmio (Slot->SdHcBase + SD_HC_HOST_CTRL2, TRUE, sizeof (HostCtrl2), &HostCtrl2);\r
if ((HostCtrl2 & BIT3) == 0) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: SwitchVoltage fails with HostCtrl2 = 0x%x\n", HostCtrl2));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: SwitchVoltage fails with HostCtrl2 = 0x%x\n", HostCtrl2));\r
Status = EFI_DEVICE_ERROR;\r
goto Error;\r
}\r
\r
SdPeimHcRwMmio (Slot->SdHcBase + SD_HC_PRESENT_STATE, TRUE, sizeof (PresentState), &PresentState);\r
if (((PresentState >> 20) & 0xF) != 0xF) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: SwitchVoltage fails with PresentState = 0x%x, It should be 0xF\n", PresentState));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: SwitchVoltage fails with PresentState = 0x%x, It should be 0xF\n", PresentState));\r
Status = EFI_DEVICE_ERROR;\r
goto Error;\r
}\r
}\r
- DEBUG ((EFI_D_INFO, "SdPeimIdentification: Switch to 1.8v signal voltage success\n"));\r
+\r
+ DEBUG ((DEBUG_INFO, "SdPeimIdentification: Switch to 1.8v signal voltage success\n"));\r
}\r
\r
Status = SdPeimAllSendCid (Slot);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: Executing SdPeimAllSendCid fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing SdPeimAllSendCid fails with %r\n", Status));\r
return Status;\r
}\r
\r
Status = SdPeimSetRca (Slot, &Rca);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((EFI_D_ERROR, "SdPeimIdentification: Executing SdPeimSetRca fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "SdPeimIdentification: Executing SdPeimSetRca fails with %r\n", Status));\r
return Status;\r
}\r
+\r
//\r
// Enter Data Tranfer Mode.\r
//\r
- DEBUG ((EFI_D_INFO, "Found a SD device at slot [%d]\n", Slot));\r
+ DEBUG ((DEBUG_INFO, "Found a SD device at slot [%d]\n", Slot));\r
\r
Status = SdPeimSetBusMode (Slot, Rca, ((Ocr & BIT24) != 0));\r
\r
//\r
// Set SD Bus Power = 0\r
//\r
- PowerCtrl = (UINT8)~BIT0;\r
- Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_POWER_CTRL, sizeof (PowerCtrl), &PowerCtrl);\r
+ PowerCtrl = (UINT8) ~BIT0;\r
+ Status = SdPeimHcAndMmio (Slot->SdHcBase + SD_HC_POWER_CTRL, sizeof (PowerCtrl), &PowerCtrl);\r
return EFI_DEVICE_ERROR;\r
}\r
projects / mirror_edk2.git / blobdiff