Update the copyright notice format

[mirror_edk2.git] / MdeModulePkg / Core / Dxe / Event / Tpl.c

diff --git a/MdeModulePkg/Core/Dxe/Event/Tpl.c b/MdeModulePkg/Core/Dxe/Event/Tpl.c
index 02597f3254617edd83cd1af5d400e5488021aede..7fe9b12600300a99c2836956b70afd50646de6f2 100644 (file)
--- a/MdeModulePkg/Core/Dxe/Event/Tpl.c
+++ b/MdeModulePkg/Core/Dxe/Event/Tpl.c
@@ -1,20 +1,19 @@
-/** @file \r
+/** @file\r
+  Task priority (TPL) functions.\r
 \r
-  Task priority (TPL) function \r
+Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
 \r
-Copyright (c) 2006 - 2008, Intel Corporation                                                         \r
-All rights reserved. This program and the accompanying materials                          \r
-are licensed and made available under the terms and conditions of the BSD License         \r
-which accompanies this distribution.  The full text of the license may be found at        \r
-http://opensource.org/licenses/bsd-license.php                                            \r
-                                                                                          \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 **/\r
 \r
-#include <DxeMain.h>\r
-\r
+#include "DxeMain.h"\r
+#include "Event.h"\r
 \r
 /**\r
   Set Interrupt State.\r
@@ -22,56 +21,37 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
   @param  Enable  The state of enable or disable interrupt\r
 \r
 **/\r
-STATIC\r
 VOID\r
 CoreSetInterruptState (\r
   IN BOOLEAN      Enable\r
   )\r
 {\r
-  if (gCpu != NULL) {\r
-    if (Enable) {\r
-      gCpu->EnableInterrupt(gCpu);\r
-    } else {\r
-      gCpu->DisableInterrupt(gCpu);\r
-    }\r
-  }\r
-}\r
-\r
-//\r
-// Return the highest set bit\r
-//\r
-\r
-/**\r
-  Return the highest set bit.\r
-\r
-  @param  Number  The value to check \r
-\r
-  @return Bit position of the highest set bit\r
-\r
-**/\r
-UINTN\r
-CoreHighestSetBit (\r
-  IN UINTN     Number\r
-  )\r
-{\r
-  UINTN   msb;\r
+  EFI_STATUS  Status;\r
+  BOOLEAN     InSmm;\r
   \r
-  msb = 31;\r
-  while ((msb > 0) && ((Number & (UINTN)(1 << msb)) == 0)) {\r
-    msb--;\r
+  if (gCpu == NULL) {\r
+    return;\r
+  }\r
+  if (!Enable) {\r
+    gCpu->DisableInterrupt (gCpu);\r
+    return;\r
+  }\r
+  if (gSmmBase2 == NULL) {\r
+    gCpu->EnableInterrupt (gCpu);\r
+    return;\r
+  }\r
+  Status = gSmmBase2->InSmm (gSmmBase2, &InSmm);\r
+  if (!EFI_ERROR (Status) && !InSmm) {\r
+    gCpu->EnableInterrupt(gCpu);\r
   }\r
-\r
-  return msb;\r
 }\r
 \r
 \r
-\r
-\r
 /**\r
   Raise the task priority level to the new level.\r
   High level is implemented by disabling processor interrupts.\r
 \r
-  @param  NewTpl  New task priority level \r
+  @param  NewTpl  New task priority level\r
 \r
   @return The previous task priority level\r
 \r
@@ -131,15 +111,14 @@ CoreRestoreTpl (
   //\r
 \r
   if (OldTpl >= TPL_HIGH_LEVEL  &&  NewTpl < TPL_HIGH_LEVEL) {\r
-    gEfiCurrentTpl = TPL_HIGH_LEVEL;  \r
+    gEfiCurrentTpl = TPL_HIGH_LEVEL;\r
   }\r
 \r
   //\r
   // Dispatch any pending events\r
   //\r
-\r
-  while ((-2 << NewTpl) & gEventPending) {\r
-    gEfiCurrentTpl = CoreHighestSetBit (gEventPending);\r
+  while (((-2 << NewTpl) & gEventPending) != 0) {\r
+    gEfiCurrentTpl = HighBitSet64 (gEventPending);\r
     if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r
       CoreSetInterruptState (TRUE);\r
     }\r