move header files in MdeModulePkg\Core\Dxe except DxeMain.h into their corresponding...

[mirror_edk2.git] / MdeModulePkg / Core / Dxe / Event / Tpl.c

diff --git a/MdeModulePkg/Core/Dxe/Event/Tpl.c b/MdeModulePkg/Core/Dxe/Event/Tpl.c
index 1fbf39ece34c6ca49b38c480693e45a05fe7dfc4..dd9c57e1d3d139779a6220de30b55a4945aeda45 100644 (file)
--- a/MdeModulePkg/Core/Dxe/Event/Tpl.c
+++ b/MdeModulePkg/Core/Dxe/Event/Tpl.c
@@ -1,5 +1,5 @@
 /** @file\r
-  Task priority (TPL) function\r
+  Task priority (TPL) functions.\r
 \r
 Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
 All rights reserved. This program and the accompanying materials\r
@@ -12,8 +12,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 \r
 **/\r
 \r
-#include <DxeMain.h>\r
-\r
+#include "DxeMain.h"\r
+#include "Event.h"\r
 \r
 /**\r
   Set Interrupt State.\r
@@ -35,41 +35,12 @@ CoreSetInterruptState (
   }\r
 }\r
 \r
-//\r
-// Return the highest set bit\r
-//\r
-\r
-/**\r
-  Return the highest set bit.\r
-\r
-  @param  Number  The value to check \r
-\r
-  @return Bit position of the highest set bit\r
-\r
-**/\r
-UINTN\r
-CoreHighestSetBit (\r
-  IN UINTN     Number\r
-  )\r
-{\r
-  UINTN   msb;\r
-  \r
-  msb = 31;\r
-  while ((msb > 0) && ((Number & (UINTN)(1 << msb)) == 0)) {\r
-    msb--;\r
-  }\r
-\r
-  return msb;\r
-}\r
-\r
-\r
-\r
 \r
 /**\r
   Raise the task priority level to the new level.\r
   High level is implemented by disabling processor interrupts.\r
 \r
-  @param  NewTpl  New task priority level \r
+  @param  NewTpl  New task priority level\r
 \r
   @return The previous task priority level\r
 \r
@@ -129,15 +100,14 @@ CoreRestoreTpl (
   //\r
 \r
   if (OldTpl >= TPL_HIGH_LEVEL  &&  NewTpl < TPL_HIGH_LEVEL) {\r
-    gEfiCurrentTpl = TPL_HIGH_LEVEL;  \r
+    gEfiCurrentTpl = TPL_HIGH_LEVEL;\r
   }\r
 \r
   //\r
   // Dispatch any pending events\r
   //\r
-\r
-  while ((-2 << NewTpl) & gEventPending) {\r
-    gEfiCurrentTpl = CoreHighestSetBit (gEventPending);\r
+  while (((-2 << NewTpl) & gEventPending) != 0) {\r
+    gEfiCurrentTpl = HighBitSet64 (gEventPending);\r
     if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r
       CoreSetInterruptState (TRUE);\r
     }\r