/** @file\r
Task priority (TPL) functions.\r
\r
-Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
-All rights reserved. This program and the accompanying materials\r
+Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
**/\r
\r
-#include <DxeMain.h>\r
-\r
+#include "DxeMain.h"\r
+#include "Event.h"\r
\r
/**\r
Set Interrupt State.\r
IN BOOLEAN Enable\r
)\r
{\r
- if (gCpu != NULL) {\r
- if (Enable) {\r
- gCpu->EnableInterrupt(gCpu);\r
- } else {\r
- gCpu->DisableInterrupt(gCpu);\r
- }\r
+ EFI_STATUS Status;\r
+ BOOLEAN InSmm;\r
+ \r
+ if (gCpu == NULL) {\r
+ return;\r
}\r
-}\r
-\r
-//\r
-// Return the highest set bit\r
-//\r
-\r
-/**\r
- Return the highest set bit.\r
-\r
- @param Number The value to check\r
-\r
- @return Bit position of the highest set bit\r
-\r
-**/\r
-UINTN\r
-CoreHighestSetBit (\r
- IN UINTN Number\r
- )\r
-{\r
- UINTN Msb;\r
-\r
- Msb = 31;\r
- while ((Msb > 0) && ((Number & (UINTN)(1 << Msb)) == 0)) {\r
- Msb--;\r
+ if (!Enable) {\r
+ gCpu->DisableInterrupt (gCpu);\r
+ return;\r
+ }\r
+ if (gSmmBase2 == NULL) {\r
+ gCpu->EnableInterrupt (gCpu);\r
+ return;\r
+ }\r
+ Status = gSmmBase2->InSmm (gSmmBase2, &InSmm);\r
+ if (!EFI_ERROR (Status) && !InSmm) {\r
+ gCpu->EnableInterrupt(gCpu);\r
}\r
-\r
- return Msb;\r
}\r
\r
\r
-\r
-\r
/**\r
Raise the task priority level to the new level.\r
High level is implemented by disabling processor interrupts.\r
EFI_TPL OldTpl;\r
\r
OldTpl = gEfiCurrentTpl;\r
- ASSERT (OldTpl <= NewTpl);\r
+ if (OldTpl > NewTpl) {\r
+ DEBUG ((EFI_D_ERROR, "FATAL ERROR - RaiseTpl with OldTpl(0x%x) > NewTpl(0x%x)\n", OldTpl, NewTpl));\r
+ ASSERT (FALSE);\r
+ }\r
ASSERT (VALID_TPL (NewTpl));\r
\r
//\r
)\r
{\r
EFI_TPL OldTpl;\r
+ EFI_TPL PendingTpl;\r
\r
OldTpl = gEfiCurrentTpl;\r
- ASSERT (NewTpl <= OldTpl);\r
+ if (NewTpl > OldTpl) {\r
+ DEBUG ((EFI_D_ERROR, "FATAL ERROR - RestoreTpl with NewTpl(0x%x) > OldTpl(0x%x)\n", NewTpl, OldTpl));\r
+ ASSERT (FALSE);\r
+ }\r
ASSERT (VALID_TPL (NewTpl));\r
\r
//\r
//\r
// Dispatch any pending events\r
//\r
+ while (gEventPending != 0) {\r
+ PendingTpl = (UINTN) HighBitSet64 (gEventPending);\r
+ if (PendingTpl <= NewTpl) {\r
+ break;\r
+ }\r
\r
- while ((-2 << NewTpl) & gEventPending) {\r
- gEfiCurrentTpl = CoreHighestSetBit (gEventPending);\r
+ gEfiCurrentTpl = PendingTpl;\r
if (gEfiCurrentTpl < TPL_HIGH_LEVEL) {\r
CoreSetInterruptState (TRUE);\r
}\r