Code Scrub for Dxe Core.

[mirror_edk2.git] / MdeModulePkg / Core / Dxe / Event / Tpl.c

diff --git a/MdeModulePkg/Core/Dxe/Event/Tpl.c b/MdeModulePkg/Core/Dxe/Event/Tpl.c
index 4f63889709412612f8f932f12c2d712aaee615fd..e99cb7355c40d5aa2f7c9387039b8adc0bc8a798 100644 (file)
--- a/MdeModulePkg/Core/Dxe/Event/Tpl.c
+++ b/MdeModulePkg/Core/Dxe/Event/Tpl.c
@@ -42,7 +42,7 @@ CoreSetInterruptState (
 /**\r
   Return the highest set bit.\r
 \r
-  @param  Number  The value to check \r
+  @param  Number  The value to check\r
 \r
   @return Bit position of the highest set bit\r
 \r
@@ -53,7 +53,7 @@ CoreHighestSetBit (
   )\r
 {\r
   UINTN   Msb;\r
-  \r
+\r
   Msb = 31;\r
   while ((Msb > 0) && ((Number & (UINTN)(1 << Msb)) == 0)) {\r
     Msb--;\r
@@ -69,7 +69,7 @@ CoreHighestSetBit (
   Raise the task priority level to the new level.\r
   High level is implemented by disabling processor interrupts.\r
 \r
-  @param  NewTpl  New task priority level \r
+  @param  NewTpl  New task priority level\r
 \r
   @return The previous task priority level\r
 \r
@@ -129,7 +129,7 @@ CoreRestoreTpl (
   //\r
 \r
   if (OldTpl >= TPL_HIGH_LEVEL  &&  NewTpl < TPL_HIGH_LEVEL) {\r
-    gEfiCurrentTpl = TPL_HIGH_LEVEL;  \r
+    gEfiCurrentTpl = TPL_HIGH_LEVEL;\r
   }\r
 \r
   //\r