+++ /dev/null
-/** @file\r
- x64 Long Mode Virtual Memory Management Definitions \r
-\r
- References:\r
- 1) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 1:Basic Architecture, Intel\r
- 2) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 2:Instruction Set Reference, Intel\r
- 3) IA-32 Intel(R) Atchitecture Software Developer's Manual Volume 3:System Programmer's Guide, Intel\r
- 4) AMD64 Architecture Programmer's Manual Volume 2: System Programming\r
-\r
-Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
-All rights reserved. This program and the accompanying materials\r
-are licensed and made available under the terms and conditions of the BSD License\r
-which accompanies this distribution. The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-**/ \r
-#ifndef _VIRTUAL_MEMORY_H_\r
-#define _VIRTUAL_MEMORY_H_\r
-\r
-\r
-#define SYS_CODE64_SEL 0x38\r
-\r
-#pragma pack(1)\r
-\r
-typedef union {\r
- struct {\r
- UINT32 LimitLow : 16;\r
- UINT32 BaseLow : 16;\r
- UINT32 BaseMid : 8;\r
- UINT32 Type : 4;\r
- UINT32 System : 1;\r
- UINT32 Dpl : 2;\r
- UINT32 Present : 1;\r
- UINT32 LimitHigh : 4;\r
- UINT32 Software : 1;\r
- UINT32 Reserved : 1;\r
- UINT32 DefaultSize : 1;\r
- UINT32 Granularity : 1;\r
- UINT32 BaseHigh : 8;\r
- } Bits;\r
- UINT64 Uint64;\r
-} IA32_GDT;\r
-\r
-typedef struct {\r
- IA32_IDT_GATE_DESCRIPTOR Ia32IdtEntry;\r
- UINT32 Offset32To63;\r
- UINT32 Reserved;\r
-} X64_IDT_GATE_DESCRIPTOR;\r
-\r
-//\r
-// Page-Map Level-4 Offset (PML4) and\r
-// Page-Directory-Pointer Offset (PDPE) entries 4K & 2MB\r
-//\r
-\r
-typedef union {\r
- struct {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Reserved:1; // Reserved\r
- UINT64 MustBeZero:2; // Must Be Zero\r
- UINT64 Available:3; // Available for use by system software\r
- UINT64 PageTableBaseAddress:40; // Page Table Base Address\r
- UINT64 AvabilableHigh:11; // Available for use by system software\r
- UINT64 Nx:1; // No Execute bit\r
- } Bits;\r
- UINT64 Uint64;\r
-} PAGE_MAP_AND_DIRECTORY_POINTER;\r
-\r
-//\r
-// Page Table Entry 2MB\r
-//\r
-typedef union {\r
- struct {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
- UINT64 MustBe1:1; // Must be 1 \r
- UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
- UINT64 Available:3; // Available for use by system software\r
- UINT64 PAT:1; //\r
- UINT64 MustBeZero:8; // Must be zero;\r
- UINT64 PageTableBaseAddress:31; // Page Table Base Address\r
- UINT64 AvabilableHigh:11; // Available for use by system software\r
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
- } Bits;\r
- UINT64 Uint64;\r
-} PAGE_TABLE_ENTRY;\r
-\r
-#pragma pack()\r
-\r
-\r
-\r
-/**\r
- Allocates and fills in the Page Directory and Page Table Entries to\r
- establish a 1:1 Virtual to Physical mapping.\r
-\r
- @param NumberOfProcessorPhysicalAddressBits Number of processor address bits \r
- to use. Limits the number of page \r
- table entries to the physical \r
- address space. \r
-\r
- @return The address of 4 level page map.\r
-\r
-**/\r
-UINTN\r
-CreateIdentityMappingPageTables (\r
- VOID\r
- );\r
-\r
-\r
-/**\r
- \r
- Fix up the vector number in the vector code.\r
- \r
- @param VectorBase Base address of the vector handler.\r
- \r
- @param VectorNum Index of vector.\r
-\r
-**/\r
-VOID\r
-EFIAPI\r
-AsmVectorFixup (\r
- VOID *VectorBase,\r
- UINT8 VectorNum\r
- );\r
-\r
-\r
-\r
-\r
-\r
-/**\r
- \r
- Get the information of vector template.\r
- \r
- @param TemplateBase Base address of the template code.\r
- \r
- @return Size of the Template code.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-AsmGetVectorTemplatInfo (\r
- OUT VOID **TemplateBase\r
- );\r
-\r
-\r
-#endif \r