replace PCI Root Bridge I/O protocol with PciLib to achieve M2 qulity.

[mirror_edk2.git] / MdeModulePkg / Core / DxeIplPeim / X64 / DxeLoadFunc.c

diff --git a/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c b/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
index 4fca3f6ac7f535c22ff0fab784c0ae74156339d9..c871dbe41f548cf3cce7825bee41848a259bfccf 100644 (file)
--- a/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
+++ b/MdeModulePkg/Core/DxeIplPeim/X64/DxeLoadFunc.c
@@ -63,6 +63,9 @@ HandOffToDxeCore (
   //    \r
   UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN) BaseOfStack, STACK_SIZE);\r
 \r
+  //\r
+  // Transfer the control to the entry point of DxeCore.\r
+  //\r
   SwitchStack (\r
     (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
     HobList.Raw,\r