MdePkg/DxeServicesLib: Return NULL GetFileBufferByFilePath reads directory

[mirror_edk2.git] / MdeModulePkg / Core / PiSmmCore / PiSmmIpl.c

diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
index 86adb1349d5e7f80dea148acd4a545c2d79f9054..ba596cd1b7efd7c937fba74eff79fdce82caa9a1 100644 (file)
--- a/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
+++ b/MdeModulePkg/Core/PiSmmCore/PiSmmIpl.c
@@ -1,7 +1,7 @@
 /** @file\r
   SMM IPL that produces SMM related runtime protocols and load the SMM Core into SMRAM\r
 \r
-  Copyright (c) 2009 - 2013, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2009 - 2015, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials are licensed and made available \r
   under the terms and conditions of the BSD License which accompanies this \r
   distribution.  The full text of the license may be found at        \r
@@ -257,7 +257,7 @@ SMM_IPL_EVENT_NOTIFICATION  mSmmIplEvents[] = {
   //\r
   { TRUE,  FALSE, &gEfiSmmConfigurationProtocolGuid,  SmmIplSmmConfigurationEventNotify, &gEfiSmmConfigurationProtocolGuid,  TPL_NOTIFY,   NULL },\r
   //\r
-  // Declare protocl notification on DxeSmmReadyToLock protocols.  When this notification is etablished, \r
+  // Declare protocol notification on DxeSmmReadyToLock protocols.  When this notification is established, \r
   // the associated event is immediately signalled, so the notification function will be executed and the \r
   // DXE SMM Ready To Lock Protocol will be found if it is already in the handle database.\r
   //\r
@@ -659,7 +659,7 @@ SmmIplSmmConfigurationEventNotify (
 \r
 /**\r
   Event notification that is fired every time a DxeSmmReadyToLock protocol is added\r
-  or if gEfiEventReadyToBootGuid is signalled.\r
+  or if gEfiEventReadyToBootGuid is signaled.\r
 \r
   @param  Event                 The Event that is being processed, not used.\r
   @param  Context               Event Context, not used.\r
@@ -694,7 +694,7 @@ SmmIplReadyToLockEventNotify (
   } else {\r
     //\r
     // If SMM is not locked yet and we got here from gEfiEventReadyToBootGuid being \r
-    // signalled, then gEfiDxeSmmReadyToLockProtocolGuid was not installed as expected.\r
+    // signaled, then gEfiDxeSmmReadyToLockProtocolGuid was not installed as expected.\r
     // Print a warning on debug builds.\r
     //\r
     DEBUG ((DEBUG_WARN, "SMM IPL!  DXE SMM Ready To Lock Protocol not installed before Ready To Boot signal\n"));\r
@@ -952,7 +952,7 @@ ExecuteSmmCoreFromSmram (
   }\r
   \r
   ImageContext.ImageAddress += ImageContext.SectionAlignment - 1;\r
-  ImageContext.ImageAddress &= ~(ImageContext.SectionAlignment - 1);\r
+  ImageContext.ImageAddress &= ~((EFI_PHYSICAL_ADDRESS)(ImageContext.SectionAlignment - 1));\r
 \r
   //\r
   // Print debug message showing SMM Core load address.\r
@@ -979,6 +979,13 @@ ExecuteSmmCoreFromSmram (
       //\r
       DEBUG ((DEBUG_INFO, "SMM IPL calling SMM Core at SMRAM address %p\n", (VOID *)(UINTN)ImageContext.EntryPoint));\r
 \r
+      gSmmCorePrivate->PiSmmCoreImageBase = ImageContext.ImageAddress;\r
+      gSmmCorePrivate->PiSmmCoreImageSize = ImageContext.ImageSize;\r
+      DEBUG ((DEBUG_INFO, "PiSmmCoreImageBase - 0x%016lx\n", gSmmCorePrivate->PiSmmCoreImageBase));\r
+      DEBUG ((DEBUG_INFO, "PiSmmCoreImageSize - 0x%016lx\n", gSmmCorePrivate->PiSmmCoreImageSize));\r
+\r
+      gSmmCorePrivate->PiSmmCoreEntryPoint = ImageContext.EntryPoint;\r
+\r
       //\r
       // Execute image\r
       //\r
@@ -1035,6 +1042,7 @@ SmmIplEntry (
   UINT64                          SmmCodeSize;\r
   EFI_LOAD_FIXED_ADDRESS_CONFIGURATION_TABLE    *LMFAConfigurationTable;\r
   EFI_CPU_ARCH_PROTOCOL           *CpuArch;\r
+  EFI_STATUS                      SetAttrStatus;\r
 \r
   //\r
   // Fill in the image handle of the SMM IPL so the SMM Core can use this as the \r
@@ -1076,6 +1084,14 @@ SmmIplEntry (
 \r
   gSmmCorePrivate->SmramRangeCount = Size / sizeof (EFI_SMRAM_DESCRIPTOR);\r
 \r
+  //\r
+  // Save a full copy\r
+  //\r
+  gSmmCorePrivate->FullSmramRangeCount = gSmmCorePrivate->SmramRangeCount;\r
+  gSmmCorePrivate->FullSmramRanges = (EFI_SMRAM_DESCRIPTOR *) AllocatePool (Size);\r
+  ASSERT (gSmmCorePrivate->FullSmramRanges != NULL);\r
+  CopyMem (gSmmCorePrivate->FullSmramRanges, gSmmCorePrivate->SmramRanges, Size);\r
+\r
   //\r
   // Open all SMRAM ranges\r
   //\r
@@ -1198,12 +1214,12 @@ SmmIplEntry (
       // Attempt to reset SMRAM cacheability to UC\r
       //\r
       if (CpuArch != NULL) {\r
-        Status = gDS->SetMemorySpaceAttributes(\r
-                        mSmramCacheBase, \r
-                        mSmramCacheSize,\r
-                        EFI_MEMORY_UC\r
-                        );\r
-        if (EFI_ERROR (Status)) {\r
+        SetAttrStatus = gDS->SetMemorySpaceAttributes(\r
+                               mSmramCacheBase, \r
+                               mSmramCacheSize,\r
+                               EFI_MEMORY_UC\r
+                               );\r
+        if (EFI_ERROR (SetAttrStatus)) {\r
           DEBUG ((DEBUG_WARN, "SMM IPL failed to reset SMRAM window to EFI_MEMORY_UC\n"));\r
         }  \r
       }\r
@@ -1235,7 +1251,8 @@ SmmIplEntry (
     // Free all allocated resources\r
     //\r
     FreePool (gSmmCorePrivate->SmramRanges);\r
-    \r
+    FreePool (gSmmCorePrivate->FullSmramRanges);\r
+\r
     return EFI_UNSUPPORTED;\r
   }\r
   \r