event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based\r
systems.\r
\r
- Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions\r
- of the BSD License which accompanies this distribution. The\r
- full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
-\r
#ifndef _SMM_CONTROL_PPI_H_\r
#define _SMM_CONTROL_PPI_H_\r
\r
#define PEI_SMM_CONTROL_PPI_GUID \\r
{ 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }\r
\r
-typedef struct _PEI_SMM_CONTROL_PPI PEI_SMM_CONTROL_PPI;\r
+typedef struct _PEI_SMM_CONTROL_PPI PEI_SMM_CONTROL_PPI;\r
\r
/**\r
Invokes SMI activation from either the preboot or runtime environment.\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *PEI_SMM_ACTIVATE) (\r
+(EFIAPI *PEI_SMM_ACTIVATE)(\r
IN EFI_PEI_SERVICES **PeiServices,\r
- IN PEI_SMM_CONTROL_PPI * This,\r
+ IN PEI_SMM_CONTROL_PPI *This,\r
IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
IN BOOLEAN Periodic OPTIONAL,\r
\r
@param PeiServices General purpose services available to every PEIM.\r
@param This The PEI_SMM_CONTROL_PPI instance.\r
- @param Periodic Optional parameter to repeat at this period one \r
+ @param Periodic Optional parameter to repeat at this period one\r
time or, if the Periodic Boolean is set, periodically.\r
\r
@retval EFI_SUCCESS The SMI/PMI has been engendered.\r
**/\r
typedef\r
EFI_STATUS\r
-(EFIAPI *PEI_SMM_DEACTIVATE) (\r
+(EFIAPI *PEI_SMM_DEACTIVATE)(\r
IN EFI_PEI_SERVICES **PeiServices,\r
- IN PEI_SMM_CONTROL_PPI * This,\r
+ IN PEI_SMM_CONTROL_PPI *This,\r
IN BOOLEAN Periodic OPTIONAL\r
);\r
\r
/// - A processor driver to abstract the SMI/PMI IPI\r
/// - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
/// Intel chipset\r
-/// \r
+///\r
struct _PEI_SMM_CONTROL_PPI {\r
- PEI_SMM_ACTIVATE Trigger;\r
- PEI_SMM_DEACTIVATE Clear;\r
+ PEI_SMM_ACTIVATE Trigger;\r
+ PEI_SMM_DEACTIVATE Clear;\r
};\r
\r
-extern EFI_GUID gPeiSmmControlPpiGuid;\r
+extern EFI_GUID gPeiSmmControlPpiGuid;\r
\r
#endif\r