#\r
# Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>\r
# Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>\r
-# (C) Copyright 2016 Hewlett Packard Enterprise Development LP<BR>\r
+# (C) Copyright 2016 - 2019 Hewlett Packard Enterprise Development LP<BR>\r
# Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
# Copyright (c) 2016, Microsoft Corporation<BR>\r
# SPDX-License-Identifier: BSD-2-Clause-Patent\r
## Include/Guid/PlatDriOverrideHii.h\r
gPlatformOverridesManagerGuid = { 0x8614567d, 0x35be, 0x4415, { 0x8d, 0x88, 0xbd, 0x7d, 0xc, 0x9c, 0x70, 0xc0 }}\r
\r
- ## Include/Guid/Ip4Config2Hii.h\r
- gIp4Config2NvDataGuid = { 0x9b942747, 0x154e, 0x4d29, { 0xa4, 0x36, 0xbf, 0x71, 0x0, 0xc8, 0xb5, 0x3b }}\r
-\r
- ## Include/Guid/VlanConfigHii.h\r
- gVlanConfigFormSetGuid = { 0xd79df6b0, 0xef44, 0x43bd, { 0x97, 0x97, 0x43, 0xe9, 0x3b, 0xcf, 0x5f, 0xa8 }}\r
-\r
- ## Include/Guid/Ip4IScsiConfigHii.h\r
- gIp4IScsiConfigGuid = { 0x6456ed61, 0x3579, 0x41c9, { 0x8a, 0x26, 0x0a, 0x0b, 0xd6, 0x2b, 0x78, 0xfc }}\r
- gIScsiCHAPAuthInfoGuid = { 0x786ec0ac, 0x65ae, 0x4d1b, { 0xb1, 0x37, 0xd, 0x11, 0xa, 0x48, 0x37, 0x97 }}\r
-\r
## Include/Guid/ZeroGuid.h\r
gZeroGuid = { 0x0, 0x0, 0x0, {0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0}}\r
\r
\r
## Include/Guid/TtyTerm.h\r
gEfiTtyTermGuid = { 0x7d916d80, 0x5bb1, 0x458c, {0xa4, 0x8f, 0xe2, 0x5f, 0xdd, 0x51, 0xef, 0x94 }}\r
+ gEdkiiLinuxTermGuid = { 0xe4364a7f, 0xf825, 0x430e, {0x9d, 0x3a, 0x9c, 0x9b, 0xe6, 0x81, 0x7c, 0xa5 }}\r
+ gEdkiiXtermR6Guid = { 0xfbfca56b, 0xbb36, 0x4b78, {0xaa, 0xab, 0xbe, 0x1b, 0x97, 0xec, 0x7c, 0xcb }}\r
+ gEdkiiVT400Guid = { 0x8e46dddd, 0x3d49, 0x4a9d, {0xb8, 0x75, 0x3c, 0x08, 0x6f, 0x6a, 0xa2, 0xbd }}\r
+ gEdkiiSCOTermGuid = { 0xfc7dd6e0, 0x813c, 0x434d, {0xb4, 0xda, 0x3b, 0xd6, 0x49, 0xe9, 0xe1, 0x5a }}\r
\r
## Include/Guid/HiiBootMaintenanceFormset.h\r
gEfiIfrBootMaintenanceGuid = { 0xb2dedc91, 0xd59f, 0x48d2, { 0x89, 0x8a, 0x12, 0x49, 0xc, 0x74, 0xa4, 0xe0 }}\r
# Include/Protocol/DebuggerConfiguration.h\r
gEfiDebuggerConfigurationProtocolGuid = { 0x577d959c, 0xe967, 0x4546, { 0x86, 0x20, 0xc7, 0x78, 0xfa, 0xe5, 0xda, 0x05 }}\r
\r
- ## Include/Protocol/Dpc.h\r
- gEfiDpcProtocolGuid = {0x480f8ae9, 0xc46, 0x4aa9, { 0xbc, 0x89, 0xdb, 0x9f, 0xba, 0x61, 0x98, 0x6 }}\r
-\r
## Fault Tolerant Write protocol provides boot-time service to do fault tolerant write capability for block devices.\r
# Include/Protocol/FaultTolerantWrite.h\r
gEfiFaultTolerantWriteProtocolGuid = { 0x3EBD9E82, 0x2C78, 0x4DE6, { 0x97, 0x86, 0x8D, 0x4B, 0xFC, 0xB7, 0xC8, 0x81 }}\r
# @Prompt Maximum number of PEI performance log entries.\r
gEfiMdeModulePkgTokenSpaceGuid.PcdMaxPeiPerformanceLogEntries16|0|UINT16|0x00010035\r
\r
- ## RTC Update Timeout Value(microsecond).\r
- # @Prompt RTC Update Timeout Value.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdRealTimeClockUpdateTimeout|100000|UINT32|0x00010034\r
-\r
## Indicates the 16550 serial port registers are in MMIO space, or in I/O space. Default is I/O space.<BR><BR>\r
# TRUE - 16550 serial port registers are in MMIO space.<BR>\r
# FALSE - 16550 serial port registers are in I/O space.<BR>\r
# @Expression 0x80000002 | (gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl & 0xD8) == 0\r
gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl|0x07|UINT8|0x00020005\r
\r
- ## This setting can override the default TFTP block size. A value of 0 computes\r
- # the default from MTU information. A non-zero value will be used as block size\r
- # in bytes.\r
- # @Prompt TFTP block size.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdTftpBlockSize|0x0|UINT64|0x30001026\r
-\r
## Maximum address that the DXE Core will allocate the EFI_SYSTEM_TABLE_POINTER\r
# structure. The default value for this PCD is 0, which means that the DXE Core\r
# will allocate the buffer from the EFI_SYSTEM_TABLE_POINTER structure on a 4MB\r
\r
## SMBIOS version.\r
# @Prompt SMBIOS version.\r
- gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0302|UINT16|0x00010055\r
+ gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosVersion|0x0303|UINT16|0x00010055\r
\r
## SMBIOS Docrev field in SMBIOS 3.0 (64-bit) Entry Point Structure.\r
# @Prompt SMBIOS Docrev field in SMBIOS 3.0 (64-bit) Entry Point Structure.\r