# This is the assembly code for transferring to control to OS S3 waking vector\r
# for X64 platform\r
#\r
-# Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials are\r
# licensed and made available under the terms and conditions of the BSD License\r
ASM_PFX(AsmTransferControl):\r
# rcx S3WakingVector :DWORD\r
# rdx AcpiLowMemoryBase :DWORD\r
- lea _AsmTransferControl_al_0000, %eax \r
+ lea _AsmTransferControl_al_0000(%rip), %eax \r
movq $0x2800000000, %r8 \r
orq %r8, %rax\r
pushq %rax\r
shrd $20, %ecx, %ebx\r
andl $0x0f, %ecx \r
movw %cx, %bx\r
- movl %ebx, jmp_addr \r
+ movl %ebx, jmp_addr(%rip) \r
lret\r
_AsmTransferControl_al_0000:\r
.byte 0x0b8, 0x30, 0 # mov ax, 30h as selector\r
ASM_GLOBAL ASM_PFX(AsmJmpAddr32)\r
ASM_PFX(AsmJmpAddr32):\r
.long 0\r
+\r
+ASM_GLOBAL ASM_PFX(PageFaultHandlerHook)\r
+ASM_PFX(PageFaultHandlerHook):\r
+ pushq %rax # save all volatile registers\r
+ pushq %rcx\r
+ pushq %rdx\r
+ pushq %r8\r
+ pushq %r9\r
+ pushq %r10\r
+ pushq %r11\r
+ # save volatile fp registers\r
+ addq $-0x68, %rsp\r
+ stmxcsr 0x60(%rsp)\r
+ movdqa %xmm0, 0x0(%rsp) \r
+ movdqa %xmm1, 0x10(%rsp) \r
+ movdqa %xmm2, 0x20(%rsp) \r
+ movdqa %xmm3, 0x30(%rsp) \r
+ movdqa %xmm4, 0x40(%rsp) \r
+ movdqa %xmm5, 0x50(%rsp) \r
+\r
+ addq $-0x20, %rsp\r
+ call ASM_PFX(PageFaultHandler)\r
+ addq $0x20, %rsp\r
+\r
+ # load volatile fp registers\r
+ ldmxcsr 0x60(%rsp)\r
+ movdqa 0x0(%rsp), %xmm0\r
+ movdqa 0x10(%rsp), %xmm1\r
+ movdqa 0x20(%rsp), %xmm2\r
+ movdqa 0x30(%rsp), %xmm3\r
+ movdqa 0x40(%rsp), %xmm4\r
+ movdqa 0x50(%rsp), %xmm5\r
+ addq $0x68, %rsp\r
+\r
+ testb %al, %al\r
+\r
+ popq %r11\r
+ popq %r10\r
+ popq %r9\r
+ popq %r8\r
+ popq %rdx\r
+ popq %rcx\r
+ popq %rax # restore all volatile registers\r
+ jnz L1\r
+ jmpq *ASM_PFX(mOriginalHandler)(%rip)\r
+L1:\r
+ addq $0x08, %rsp # skip error code for PF\r
+ iretq\r