/** @file\r
\r
-Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
\r
-This program and the accompanying materials\r
-are licensed and made available under the terms and conditions\r
-of the BSD License which accompanies this distribution. The\r
-full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php\r
-\r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <Ppi/ReadOnlyVariable2.h>\r
#include <Guid/CapsuleVendor.h>\r
\r
+#include <Library/BaseLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PeimEntryPoint.h>\r
#include <Library/PeiServicesLib.h>\r
#include <Library/PeCoffGetEntryPointLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/ReportStatusCodeLib.h>\r
+#include <Library/DebugAgentLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
#include <IndustryStandard/PeImage.h>\r
#include "Common/CommonHeader.h"\r
\r
-#ifdef MDE_CPU_IA32 \r
+#ifdef MDE_CPU_IA32\r
\r
-#pragma pack(1)\r
+ #pragma pack(1)\r
\r
//\r
// Page-Map Level-4 Offset (PML4) and\r
\r
typedef union {\r
struct {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Reserved:1; // Reserved\r
- UINT64 MustBeZero:2; // Must Be Zero\r
- UINT64 Available:3; // Available for use by system software\r
- UINT64 PageTableBaseAddress:40; // Page Table Base Address\r
- UINT64 AvabilableHigh:11; // Available for use by system software\r
- UINT64 Nx:1; // No Execute bit\r
+ UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r
+ UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
+ UINT64 Reserved : 1; // Reserved\r
+ UINT64 MustBeZero : 2; // Must Be Zero\r
+ UINT64 Available : 3; // Available for use by system software\r
+ UINT64 PageTableBaseAddress : 40; // Page Table Base Address\r
+ UINT64 AvabilableHigh : 11; // Available for use by system software\r
+ UINT64 Nx : 1; // No Execute bit\r
} Bits;\r
UINT64 Uint64;\r
} PAGE_MAP_AND_DIRECTORY_POINTER;\r
//\r
typedef union {\r
struct {\r
- UINT64 Present:1; // 0 = Not present in memory, 1 = Present in memory\r
- UINT64 ReadWrite:1; // 0 = Read-Only, 1= Read/Write\r
- UINT64 UserSupervisor:1; // 0 = Supervisor, 1=User\r
- UINT64 WriteThrough:1; // 0 = Write-Back caching, 1=Write-Through caching\r
- UINT64 CacheDisabled:1; // 0 = Cached, 1=Non-Cached\r
- UINT64 Accessed:1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
- UINT64 Dirty:1; // 0 = Not Dirty, 1 = written by processor on access to page\r
- UINT64 MustBe1:1; // Must be 1 \r
- UINT64 Global:1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
- UINT64 Available:3; // Available for use by system software\r
- UINT64 PAT:1; //\r
- UINT64 MustBeZero:8; // Must be zero;\r
- UINT64 PageTableBaseAddress:31; // Page Table Base Address\r
- UINT64 AvabilableHigh:11; // Available for use by system software\r
- UINT64 Nx:1; // 0 = Execute Code, 1 = No Code Execution\r
+ UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r
+ UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
+ UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page\r
+ UINT64 MustBe1 : 1; // Must be 1\r
+ UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
+ UINT64 Available : 3; // Available for use by system software\r
+ UINT64 PAT : 1; //\r
+ UINT64 MustBeZero : 8; // Must be zero;\r
+ UINT64 PageTableBaseAddress : 31; // Page Table Base Address\r
+ UINT64 AvabilableHigh : 11; // Available for use by system software\r
+ UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution\r
} Bits;\r
UINT64 Uint64;\r
} PAGE_TABLE_ENTRY;\r
\r
-#pragma pack()\r
+//\r
+// Page Table Entry 1GB\r
+//\r
+typedef union {\r
+ struct {\r
+ UINT64 Present : 1; // 0 = Not present in memory, 1 = Present in memory\r
+ UINT64 ReadWrite : 1; // 0 = Read-Only, 1= Read/Write\r
+ UINT64 UserSupervisor : 1; // 0 = Supervisor, 1=User\r
+ UINT64 WriteThrough : 1; // 0 = Write-Back caching, 1=Write-Through caching\r
+ UINT64 CacheDisabled : 1; // 0 = Cached, 1=Non-Cached\r
+ UINT64 Accessed : 1; // 0 = Not accessed, 1 = Accessed (set by CPU)\r
+ UINT64 Dirty : 1; // 0 = Not Dirty, 1 = written by processor on access to page\r
+ UINT64 MustBe1 : 1; // Must be 1\r
+ UINT64 Global : 1; // 0 = Not global page, 1 = global page TLB not cleared on CR3 write\r
+ UINT64 Available : 3; // Available for use by system software\r
+ UINT64 PAT : 1; //\r
+ UINT64 MustBeZero : 17; // Must be zero;\r
+ UINT64 PageTableBaseAddress : 22; // Page Table Base Address\r
+ UINT64 AvabilableHigh : 11; // Available for use by system software\r
+ UINT64 Nx : 1; // 0 = Execute Code, 1 = No Code Execution\r
+ } Bits;\r
+ UINT64 Uint64;\r
+} PAGE_TABLE_1G_ENTRY;\r
+\r
+ #pragma pack()\r
\r
typedef\r
EFI_STATUS\r
(*COALESCE_ENTRY) (\r
- IN EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_CAPSULE_BLOCK_DESCRIPTOR *BlockList,\r
- IN OUT VOID **MemoryBase,\r
- IN OUT UINTN *MemorySize\r
+ SWITCH_32_TO_64_CONTEXT *EntrypointContext,\r
+ SWITCH_64_TO_32_CONTEXT *ReturnContext\r
);\r
\r
#endif\r
projects / mirror_edk2.git / blobdiff