ArmPlatformPkg/ArmVExpressDxe: remove FDT handling from ArmFvpDxe

[mirror_edk2.git] / MdeModulePkg / Universal / CapsuleRuntimeDxe / X64 / SaveLongModeContext.c

diff --git a/MdeModulePkg/Universal/CapsuleRuntimeDxe/X64/SaveLongModeContext.c b/MdeModulePkg/Universal/CapsuleRuntimeDxe/X64/SaveLongModeContext.c
index 79615c9755398b938463f3e5964bc2a429ce91b5..7e0dd5cf13b8bb29ee23b5ee9019c7e4cc552f90 100644 (file)
--- a/MdeModulePkg/Universal/CapsuleRuntimeDxe/X64/SaveLongModeContext.c
+++ b/MdeModulePkg/Universal/CapsuleRuntimeDxe/X64/SaveLongModeContext.c
@@ -2,7 +2,7 @@
   Create the variable to save the base address of page table and stack\r
   for transferring into long mode in IA32 capsule PEI.\r
 \r
-Copyright (c) 2011 - 2014, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2011 - 2015, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -30,7 +30,11 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 #include <Library/BaseLib.h>\r
 #include <Library/UefiLib.h>\r
 #include <Library/BaseMemoryLib.h>\r
-#include <Library/HobLib.h>\r
+\r
+//\r
+// 8 extra pages for PF handler.\r
+//\r
+#define EXTRA_PAGE_TABLE_PAGES   8\r
 \r
 /**\r
   Allocate EfiReservedMemoryType below 4G memory address.\r
@@ -106,80 +110,60 @@ PrepareContextForCapsulePei (
   VOID\r
   )\r
 {\r
+  UINTN                                         ExtraPageTablePages;\r
   UINT32                                        RegEax;\r
   UINT32                                        RegEdx;\r
   UINTN                                         TotalPagesNum;\r
   UINT8                                         PhysicalAddressBits;\r
-  VOID                                          *Hob;\r
   UINT32                                        NumberOfPml4EntriesNeeded;\r
   UINT32                                        NumberOfPdpEntriesNeeded;\r
   BOOLEAN                                       Page1GSupport;\r
   EFI_CAPSULE_LONG_MODE_BUFFER                  LongModeBuffer;\r
   EFI_STATUS                                    Status;\r
   VOID                                          *Registration;\r
-  \r
-  LongModeBuffer.PageTableAddress = (EFI_PHYSICAL_ADDRESS) PcdGet64 (PcdIdentifyMappingPageTablePtr);\r
 \r
-  if (LongModeBuffer.PageTableAddress == 0x0) {\r
-    //\r
-    // Calculate the size of page table, allocate the memory, and set PcdIdentifyMappingPageTablePtr.\r
-    //\r
-    Page1GSupport = FALSE;\r
-    if (PcdGetBool(PcdUse1GPageTable)) {\r
-      AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
-      if (RegEax >= 0x80000001) {\r
-        AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);\r
-        if ((RegEdx & BIT26) != 0) {\r
-          Page1GSupport = TRUE;\r
-        }\r
-      }\r
-    }\r
-    \r
-    //\r
-    // Get physical address bits supported.\r
-    //\r
-    Hob = GetFirstHob (EFI_HOB_TYPE_CPU);\r
-    if (Hob != NULL) {\r
-      PhysicalAddressBits = ((EFI_HOB_CPU *) Hob)->SizeOfMemorySpace;\r
-    } else {\r
-      AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
-      if (RegEax >= 0x80000008) {\r
-        AsmCpuid (0x80000008, &RegEax, NULL, NULL, NULL);\r
-        PhysicalAddressBits = (UINT8) RegEax;\r
-      } else {\r
-        PhysicalAddressBits = 36;\r
+  //\r
+  // Calculate the size of page table, allocate the memory.\r
+  //\r
+  Page1GSupport = FALSE;\r
+  if (PcdGetBool(PcdUse1GPageTable)) {\r
+    AsmCpuid (0x80000000, &RegEax, NULL, NULL, NULL);\r
+    if (RegEax >= 0x80000001) {\r
+      AsmCpuid (0x80000001, NULL, NULL, NULL, &RegEdx);\r
+      if ((RegEdx & BIT26) != 0) {\r
+        Page1GSupport = TRUE;\r
       }\r
     }\r
-    \r
-    //\r
-    // IA-32e paging translates 48-bit linear addresses to 52-bit physical addresses.\r
-    //\r
-    ASSERT (PhysicalAddressBits <= 52);\r
-    if (PhysicalAddressBits > 48) {\r
-      PhysicalAddressBits = 48;\r
-    }\r
-    \r
-    //\r
-    // Calculate the table entries needed.\r
-    //\r
-    if (PhysicalAddressBits <= 39 ) {\r
-      NumberOfPml4EntriesNeeded = 1;\r
-      NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));\r
-    } else {\r
-      NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));\r
-      NumberOfPdpEntriesNeeded = 512;\r
-    }\r
-    \r
-    if (!Page1GSupport) {\r
-      TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;\r
-    } else {\r
-      TotalPagesNum = NumberOfPml4EntriesNeeded + 1;\r
-    }\r
-    \r
-    LongModeBuffer.PageTableAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateReservedMemoryBelow4G (EFI_PAGES_TO_SIZE (TotalPagesNum));\r
-    ASSERT (LongModeBuffer.PageTableAddress != 0);\r
-    PcdSet64 (PcdIdentifyMappingPageTablePtr, LongModeBuffer.PageTableAddress); \r
   }\r
+\r
+  //\r
+  // Create 4G page table by default,\r
+  // and let PF handler to handle > 4G request.\r
+  //\r
+  PhysicalAddressBits = 32;\r
+  ExtraPageTablePages = EXTRA_PAGE_TABLE_PAGES;\r
+\r
+  //\r
+  // Calculate the table entries needed.\r
+  //\r
+  if (PhysicalAddressBits <= 39 ) {\r
+    NumberOfPml4EntriesNeeded = 1;\r
+    NumberOfPdpEntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 30));\r
+  } else {\r
+    NumberOfPml4EntriesNeeded = (UINT32)LShiftU64 (1, (PhysicalAddressBits - 39));\r
+    NumberOfPdpEntriesNeeded = 512;\r
+  }\r
+\r
+  if (!Page1GSupport) {\r
+    TotalPagesNum = (NumberOfPdpEntriesNeeded + 1) * NumberOfPml4EntriesNeeded + 1;\r
+  } else {\r
+    TotalPagesNum = NumberOfPml4EntriesNeeded + 1;\r
+  }\r
+  TotalPagesNum += ExtraPageTablePages;\r
+  DEBUG ((EFI_D_ERROR, "CapsuleRuntimeDxe X64 TotalPagesNum - 0x%x pages\n", TotalPagesNum));\r
+\r
+  LongModeBuffer.PageTableAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)AllocateReservedMemoryBelow4G (EFI_PAGES_TO_SIZE (TotalPagesNum));\r
+  ASSERT (LongModeBuffer.PageTableAddress != 0);\r
   \r
   //\r
   // Allocate stack\r