;/** @file\r
; Low leve IA32 specific debug support functions.\r
;\r
-; Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2006 - 2022, Intel Corporation. All rights reserved.<BR>\r
; SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
;**/\r
\r
%define FXSTOR_FLAG 0x1000000 ; bit cpuid 24 of feature flags\r
\r
-;; The FXSTOR and FXRSTOR commands are used for saving and restoring the x87,\r
-;; MMX, SSE, SSE2, etc registers. The initialization of the debugsupport driver\r
-;; MUST check the CPUID feature flags to see that these instructions are available\r
-;; and fail to init if they are not.\r
-\r
-;; fxstor [edi]\r
-%macro FXSTOR_EDI 0\r
- db 0xf, 0xae, 00000111y ; mod = 00, reg/op = 000, r/m = 111 = [edi]\r
-%endmacro\r
-\r
-;; fxrstor [esi]\r
-%macro FXRSTOR_ESI 0\r
- db 0xf, 0xae, 00001110y ; mod = 00, reg/op = 001, r/m = 110 = [esi]\r
-%endmacro\r
SECTION .data\r
\r
global ASM_PFX(OrigVector)\r
; IMPORTANT!! The debug stack has been carefully constructed to\r
; insure that esp and edi are 16 byte aligned when we get here.\r
; They MUST be. If they are not, a GP fault will occur.\r
- FXSTOR_EDI\r
+ fxsave [edi]\r
\r
;; UEFI calling convention for IA32 requires that Direction flag in EFLAGs is clear\r
cld\r
\r
;; FX_SAVE_STATE_IA32 FxSaveState;\r
mov esi, esp\r
- FXRSTOR_ESI\r
+ fxrstor [esi]\r
add esp, 512\r
\r
;; UINT32 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r