--- /dev/null
+/** @file\r
+ GUIDs and definitions used for Common Platform Error Record.\r
+\r
+ Copyright (c) 2011, Intel Corporation. All rights reserved.<BR>\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+ @par Revision Reference:\r
+ GUIDs introduced from UEFI 2.1 Specification.\r
+\r
+**/\r
+\r
+#ifndef __CPER_GUID_H__\r
+#define __CPER_GUID_H__\r
+\r
+#pragma pack(1)\r
+\r
+#define EFI_ERROR_RECORD_SIGNATURE_START EFI_SIGNATURE_32('C', 'P', 'E', 'R')\r
+#define EFI_ERROR_RECORD_SIGNATURE_END 0xFFFFFFFF\r
+\r
+///\r
+/// Error Severity in Error Record Header and Error Section Descriptor\r
+///@{\r
+#define EFI_GENERIC_ERROR_RECOVERABLE 0x00000000\r
+#define EFI_GENERIC_ERROR_FATAL 0x00000001\r
+#define EFI_GENERIC_ERROR_CORRECTED 0x00000002\r
+#define EFI_GENERIC_ERROR_INFO 0x00000003\r
+///@}\r
+\r
+///\r
+/// The validation bit mask indicates the validity of the following fields\r
+/// in Error Record Header.\r
+///@{\r
+#define EFI_ERROR_RECORD_HEADER_PLATFORM_ID_VALID BIT0\r
+#define EFI_ERROR_RECORD_HEADER_TIME_STAMP_VALID BIT1\r
+#define EFI_ERROR_RECORD_HEADER_PARTITION_ID_VALID BIT2\r
+///@}\r
+\r
+///\r
+/// Timestamp is precise if this bit is set and correlates to the time of the\r
+/// error event.\r
+///\r
+#define EFI_ERROR_TIME_STAMP_PRECISE BIT0\r
+\r
+///\r
+/// The timestamp correlates to the time when the error information was collected\r
+/// by the system software and may not necessarily represent the time of the error\r
+/// event. The timestamp contains the local time in BCD format.\r
+///\r
+typedef struct {\r
+ UINT8 Seconds;\r
+ UINT8 Minutes;\r
+ UINT8 Hours;\r
+ UINT8 Flag;\r
+ UINT8 Day;\r
+ UINT8 Month;\r
+ UINT8 Year;\r
+ UINT8 Century;\r
+} EFI_ERROR_TIME_STAMP;\r
+\r
+///\r
+/// GUID value indicating the record association with an error event notification type.\r
+///@{\r
+#define EFI_EVENT_NOTIFICATION_TYEP_CMC_GUID \\r
+ { \\r
+ 0x2DCE8BB1, 0xBDD7, 0x450e, { 0xB9, 0xAD, 0x9C, 0xF4, 0xEB, 0xD4, 0xF8, 0x90 } \\r
+ }\r
+#define EFI_EVENT_NOTIFICATION_TYEP_CPE_GUID \\r
+ { \\r
+ 0x4E292F96, 0xD843, 0x4a55, { 0xA8, 0xC2, 0xD4, 0x81, 0xF2, 0x7E, 0xBE, 0xEE } \\r
+ }\r
+#define EFI_EVENT_NOTIFICATION_TYEP_MCE_GUID \\r
+ { \\r
+ 0xE8F56FFE, 0x919C, 0x4cc5, { 0xBA, 0x88, 0x65, 0xAB, 0xE1, 0x49, 0x13, 0xBB } \\r
+ }\r
+#define EFI_EVENT_NOTIFICATION_TYEP_PCIE_GUID \\r
+ { \\r
+ 0xCF93C01F, 0x1A16, 0x4dfc, { 0xB8, 0xBC, 0x9C, 0x4D, 0xAF, 0x67, 0xC1, 0x04 } \\r
+ }\r
+#define EFI_EVENT_NOTIFICATION_TYEP_INIT_GUID \\r
+ { \\r
+ 0xCC5263E8, 0x9308, 0x454a, { 0x89, 0xD0, 0x34, 0x0B, 0xD3, 0x9B, 0xC9, 0x8E } \\r
+ }\r
+#define EFI_EVENT_NOTIFICATION_TYEP_NMI_GUID \\r
+ { \\r
+ 0x5BAD89FF, 0xB7E6, 0x42c9, { 0x81, 0x4A, 0xCF, 0x24, 0x85, 0xD6, 0xE9, 0x8A } \\r
+ }\r
+#define EFI_EVENT_NOTIFICATION_TYEP_BOOT_GUID \\r
+ { \\r
+ 0x3D61A466, 0xAB40, 0x409a, { 0xA6, 0x98, 0xF3, 0x62, 0xD4, 0x64, 0xB3, 0x8F } \\r
+ }\r
+#define EFI_EVENT_NOTIFICATION_TYEP_DMAR_GUID \\r
+ { \\r
+ 0x667DD791, 0xC6B3, 0x4c27, { 0x8A, 0x6B, 0x0F, 0x8E, 0x72, 0x2D, 0xEB, 0x41 } \\r
+ }\r
+///@}\r
+\r
+///\r
+/// Error Record Header Flags\r
+///@{\r
+#define EFI_HW_ERROR_FLAGS_RECOVERED 0x00000001\r
+#define EFI_HW_ERROR_FLAGS_PREVERR 0x00000002\r
+#define EFI_HW_ERROR_FLAGS_SIMULATED 0x00000004\r
+///@}\r
+\r
+///\r
+/// Common error record header\r
+///\r
+typedef struct {\r
+ UINT32 SignatureStart;\r
+ UINT16 Revision;\r
+ UINT32 SignatureEnd;\r
+ UINT16 SectionCount;\r
+ UINT32 ErrorSeverity;\r
+ UINT32 ValidationBits;\r
+ UINT32 RecordLength;\r
+ EFI_ERROR_TIME_STAMP TimeStamp;\r
+ EFI_GUID PlatformID;\r
+ EFI_GUID PartitionID;\r
+ EFI_GUID CreatorID;\r
+ EFI_GUID NotificationType;\r
+ UINT64 RecordID;\r
+ UINT32 Flags;\r
+ UINT64 PersistenceInfo;\r
+ UINT8 Resv1[12];\r
+ ///\r
+ /// An array of SectionCount descriptors for the associated\r
+ /// sections. The number of valid sections is equivalent to the\r
+ /// SectionCount. The buffer size of the record may include\r
+ /// more space to dynamically add additional Section\r
+ /// Descriptors to the error record.\r
+ ///\r
+} EFI_COMMON_ERROR_RECORD_HEADER;\r
+\r
+///\r
+/// Validity Fields in Error Section Descriptor.\r
+///\r
+#define EFI_ERROR_SECTION_FRU_ID_VALID BIT0\r
+#define EFI_ERROR_SECTION_FRU_STRING_VALID BIT1\r
+\r
+///\r
+/// Flag field contains information that describes the error section\r
+/// in Error Section Descriptor.\r
+///\r
+#define EFI_ERROR_SECTION_FLAGS_PRIMARY BIT0\r
+#define EFI_ERROR_SECTION_FLAGS_CONTAINMENT_WARNING BIT1\r
+#define EFI_ERROR_SECTION_FLAGS_RESET BIT2\r
+#define EFI_ERROR_SECTION_FLAGS_ERROR_THRESHOLD_EXCEEDED BIT3\r
+#define EFI_ERROR_SECTION_FLAGS_RESOURCE_NOT_ACCESSIBLE BIT4\r
+#define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5\r
+\r
+///\r
+/// Error Sectition Type GUIDs in Error Section Descriptor\r
+///@{\r
+#define EFI_ERROR_SECTION_PROCESSOR_GENERIC_GUID \\r
+ { \\r
+ 0x9876ccad, 0x47b4, 0x4bdb, { 0xb6, 0x5e, 0x16, 0xf1, 0x93, 0xc4, 0xf3, 0xdb } \\r
+ }\r
+#define EFI_ERROR_SECTION_PROCESSOR_SPECIFIC_GUID \\r
+ { \\r
+ 0xdc3ea0b0, 0xa144, 0x4797, { 0xb9, 0x5b, 0x53, 0xfa, 0x24, 0x2b, 0x6e, 0x1d } \\r
+ }\r
+#define EFI_ERROR_SECTION_PLATFORM_MEMORY_GUID \\r
+ { \\r
+ 0xa5bc1114, 0x6f64, 0x4ede, { 0xb8, 0x63, 0x3e, 0x83, 0xed, 0x7c, 0x83, 0xb1 } \\r
+ }\r
+#define EFI_ERROR_SECTION_PCIE_GUID \\r
+ { \\r
+ 0xd995e954, 0xbbc1, 0x430f, { 0xad, 0x91, 0xb4, 0x4d, 0xcb, 0x3c, 0x6f, 0x35 } \\r
+ }\r
+#define EFI_ERROR_SECTION_FW_ERROR_RECORD_GUID \\r
+ { \\r
+ 0x81212a96, 0x09ed, 0x4996, { 0x94, 0x71, 0x8d, 0x72, 0x9c, 0x8e, 0x69, 0xed } \\r
+ }\r
+#define EFI_ERROR_SECTION_PCI_PCIX_BUS_GUID \\r
+ { \\r
+ 0xc5753963, 0x3b84, 0x4095, { 0xbf, 0x78, 0xed, 0xda, 0xd3, 0xf9, 0xc9, 0xdd } \\r
+ }\r
+#define EFI_ERROR_SECTION_PCI_DEVICE_GUID \\r
+ { \\r
+ 0xeb5e4685, 0xca66, 0x4769, { 0xb6, 0xa2, 0x26, 0x06, 0x8b, 0x00, 0x13, 0x26 } \\r
+ }\r
+#define EFI_ERROR_SECTION_DMAR_GENERIC_GUID \\r
+ { \\r
+ 0x5b51fef7, 0xc79d, 0x4434, { 0x8f, 0x1b, 0xaa, 0x62, 0xde, 0x3e, 0x2c, 0x64 } \\r
+ }\r
+#define EFI_ERROR_SECTION_DIRECTED_IO_DMAR_GUID \\r
+ { \\r
+ 0x71761d37, 0x32b2, 0x45cd, { 0xa7, 0xd0, 0xb0, 0xfe, 0xdd, 0x93, 0xe8, 0xcf } \\r
+ }\r
+#define EFI_ERROR_SECTION_IOMMU_DMAR_GUID \\r
+ { \\r
+ 0x036f84e1, 0x7f37, 0x428c, { 0xa7, 0x9e, 0x57, 0x5f, 0xdf, 0xaa, 0x84, 0xec } \\r
+ }\r
+///@}\r
+\r
+///\r
+/// Error Section Descriptor\r
+///\r
+typedef struct {\r
+ UINT32 SectionOffset;\r
+ UINT32 SectionLength;\r
+ UINT16 Revision;\r
+ UINT8 SecValidMask;\r
+ UINT8 Resv1;\r
+ UINT32 SectionFlags;\r
+ UINT8 Resv2[3];\r
+ EFI_GUID SectionType;\r
+ EFI_GUID FruId;\r
+ UINT32 Severity;\r
+ CHAR8 FruString[20];\r
+} EFI_ERROR_SECTION_DESCRIPTOR;\r
+\r
+///\r
+/// The validation bit mask indicates whether or not each of the following fields are\r
+/// valid in Proessor Generic Error section.\r
+///@{\r
+#define EFI_GENERIC_ERROR_PROC_TYPE_VALID BIT0\r
+#define EFI_GENERIC_ERROR_PROC_ISA_VALID BIT1\r
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_VALID BIT2\r
+#define EFI_GENERIC_ERROR_PROC_OPERATION_VALID BIT3\r
+#define EFI_GENERIC_ERROR_PROC_FLAGS_VALID BIT4\r
+#define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5\r
+#define EFI_GENERIC_ERROR_PROC_VERSION_VALID BIT6\r
+#define EFI_GENERIC_ERROR_PROC_BRAND_VALID BIT7\r
+#define EFI_GENERIC_ERROR_PROC_ID_VALID BIT8\r
+#define EFI_GENERIC_ERROR_PROC_TARGET_ADDR_VALID BIT9\r
+#define EFI_GENERIC_ERROR_PROC_REQUESTER_ID_VALID BIT10\r
+#define EFI_GENERIC_ERROR_PROC_RESPONDER_ID_VALID BIT11\r
+#define EFI_GENERIC_ERROR_PROC_INST_IP_VALID BIT12\r
+///@}\r
+\r
+///\r
+/// The type of the processor architecture in Proessor Generic Error section.\r
+///@{\r
+#define EFI_GENERIC_ERROR_PROC_TYPE_IA32_X64 0x00\r
+#define EFI_GENERIC_ERROR_PROC_TYPE_IA64 0x01\r
+///@}\r
+\r
+///\r
+/// The type of the instruction set executing when the error occurred in Proessor\r
+/// Generic Error section.\r
+///@{\r
+#define EFI_GENERIC_ERROR_PROC_ISA_IA32 0x00\r
+#define EFI_GENERIC_ERROR_PROC_ISA_IA64 0x01\r
+#define EFI_GENERIC_ERROR_PROC_ISA_X64 0x02\r
+///@}\r
+\r
+///\r
+/// The type of error that occurred in Proessor Generic Error section.\r
+///@{\r
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_UNKNOWN 0x00\r
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_CACHE 0x01\r
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_TLB 0x02\r
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_BUS 0x04\r
+#define EFI_GENERIC_ERROR_PROC_ERROR_TYPE_MICRO_ARCH 0x08\r
+///@}\r
+\r
+///\r
+/// The type of operation in Proessor Generic Error section.\r
+///@{\r
+#define EFI_GENERIC_ERROR_PROC_OPERATION_GENERIC 0x00\r
+#define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_READ 0x01\r
+#define EFI_GENERIC_ERROR_PROC_OPERATION_DATA_WRITE 0x02\r
+#define EFI_GENERIC_ERROR_PROC_OPERATION_INSTRUCTION_EXEC 0x03\r
+///@}\r
+\r
+///\r
+/// Flags bit mask indicates additional information about the error in Proessor Generic\r
+/// Error section\r
+///@{\r
+#define EFI_GENERIC_ERROR_PROC_FLAGS_RESTARTABLE BIT0\r
+#define EFI_GENERIC_ERROR_PROC_FLAGS_PRECISE_IP BIT1\r
+#define EFI_GENERIC_ERROR_PROC_FLAGS_OVERFLOW BIT2\r
+#define EFI_GENERIC_ERROR_PROC_FLAGS_CORRECTED BIT3\r
+///@}\r
+\r
+///\r
+/// Processor Generic Error Section\r
+/// describes processor reported hardware errors for logical processors in the system.\r
+///\r
+typedef struct {\r
+ UINT64 ValidFields;\r
+ UINT8 Type;\r
+ UINT8 Isa;\r
+ UINT8 ErrorType;\r
+ UINT8 Operation;\r
+ UINT8 Flags;\r
+ UINT8 Level;\r
+ UINT16 Resv1;\r
+ UINT64 VersionInfo;\r
+ CHAR8 BrandString[128];\r
+ UINT64 ApicId;\r
+ UINT64 TargetAddr;\r
+ UINT64 RequestorId;\r
+ UINT64 ResponderId;\r
+ UINT64 InstructionIP;\r
+} EFI_PROCESSOR_GENERIC_ERROR_DATA;\r
+\r
+\r
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
+///\r
+/// IA32 and x64 Specific definitions.\r
+///\r
+\r
+///\r
+/// GUID value indicating the type of Processor Error Information structure\r
+/// in IA32/X64 Processor Error Information Structure.\r
+///@{\r
+#define EFI_IA32_X64_ERROR_TYPE_CACHE_CHECK_GUID \\r
+ { \\r
+ 0xA55701F5, 0xE3EF, 0x43de, {0xAC, 0x72, 0x24, 0x9B, 0x57, 0x3F, 0xAD, 0x2C } \\r
+ }\r
+#define EFI_IA32_X64_ERROR_TYPE_TLB_CHECK_GUID \\r
+ { \\r
+ 0xFC06B535, 0x5E1F, 0x4562, {0x9F, 0x25, 0x0A, 0x3B, 0x9A, 0xDB, 0x63, 0xC3 } \\r
+ }\r
+#define EFI_IA32_X64_ERROR_TYPE_BUS_CHECK_GUID \\r
+ { \\r
+ 0x1CF3F8B3, 0xC5B1, 0x49a2, {0xAA, 0x59, 0x5E, 0xEF, 0x92, 0xFF, 0xA6, 0x3C } \\r
+ }\r
+#define EFI_IA32_X64_ERROR_TYPE_MS_CHECK_GUID \\r
+ { \\r
+ 0x48AB7F57, 0xDC34, 0x4f6c, {0xA7, 0xD3, 0xB0, 0xB5, 0xB0, 0xA7, 0x43, 0x14 } \\r
+ }\r
+///@}\r
+\r
+///\r
+/// The validation bit mask indicates which fields in the Cache Check structure\r
+/// are valid.\r
+///@{\r
+#define EFI_CACHE_CHECK_TRANSACTION_TYPE_VALID BIT0\r
+#define EFI_CACHE_CHECK_OPERATION_VALID BIT1\r
+#define EFI_CACHE_CHECK_LEVEL_VALID BIT2\r
+#define EFI_CACHE_CHECK_CONTEXT_CORRUPT_VALID BIT3\r
+#define EFI_CACHE_CHECK_UNCORRECTED_VALID BIT4\r
+#define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5\r
+#define EFI_CACHE_CHECK_RESTARTABLE_VALID BIT6\r
+#define EFI_CACHE_CHECK_OVERFLOW_VALID BIT7\r
+///@}\r
+\r
+///\r
+/// Type of cache error in the Cache Check structure\r
+///@{\r
+#define EFI_CACHE_CHECK_ERROR_TYPE_INSTRUCTION 0\r
+#define EFI_CACHE_CHECK_ERROR_TYPE_DATA_ACCESS 1\r
+#define EFI_CACHE_CHECK_ERROR_TYPE_GENERIC 2\r
+///@}\r
+\r
+///\r
+/// Type of cache operation that caused the error in the Cache\r
+/// Check structure\r
+///@{\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC 0\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_READ 1\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_GENERIC_WRITE 2\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_READ 3\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_DATA_WRITE 4\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_INSTRUCTION_FETCH 5\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_PREFETCH 6\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_EVICTION 7\r
+#define EFI_CACHE_CHECK_OPERATION_TYPE_SNOOP 8\r
+///@}\r
+\r
+///\r
+/// IA32/X64 Cache Check Structure\r
+///\r
+typedef struct {\r
+ UINT64 ValidFields:16;\r
+ UINT64 TransactionType:2;\r
+ UINT64 Operation:4;\r
+ UINT64 Level:3;\r
+ UINT64 ContextCorrupt:1;\r
+ UINT64 ErrorUncorrected:1;\r
+ UINT64 PreciseIp:1;\r
+ UINT64 RestartableIp:1;\r
+ UINT64 Overflow:1;\r
+ UINT64 Resv1:34;\r
+} EFI_IA32_X64_CACHE_CHECK_INFO;\r
+\r
+///\r
+/// The validation bit mask indicates which fields in the TLB Check structure\r
+/// are valid.\r
+///@{\r
+#define EFI_TLB_CHECK_TRANSACTION_TYPE_VALID BIT0\r
+#define EFI_TLB_CHECK_OPERATION_VALID BIT1\r
+#define EFI_TLB_CHECK_LEVEL_VALID BIT2\r
+#define EFI_TLB_CHECK_CONTEXT_CORRUPT_VALID BIT3\r
+#define EFI_TLB_CHECK_UNCORRECTED_VALID BIT4\r
+#define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5\r
+#define EFI_TLB_CHECK_RESTARTABLE_VALID BIT6\r
+#define EFI_TLB_CHECK_OVERFLOW_VALID BIT7\r
+///@}\r
+\r
+///\r
+/// Type of cache error in the TLB Check structure\r
+///@{\r
+#define EFI_TLB_CHECK_ERROR_TYPE_INSTRUCTION 0\r
+#define EFI_TLB_CHECK_ERROR_TYPE_DATA_ACCESS 1\r
+#define EFI_TLB_CHECK_ERROR_TYPE_GENERIC 2\r
+///@}\r
+\r
+///\r
+/// Type of cache operation that caused the error in the TLB\r
+/// Check structure\r
+///@{\r
+#define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC 0\r
+#define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_READ 1\r
+#define EFI_TLB_CHECK_OPERATION_TYPE_GENERIC_WRITE 2\r
+#define EFI_TLB_CHECK_OPERATION_TYPE_DATA_READ 3\r
+#define EFI_TLB_CHECK_OPERATION_TYPE_DATA_WRITE 4\r
+#define EFI_TLB_CHECK_OPERATION_TYPE_INST_FETCH 5\r
+#define EFI_TLB_CHECK_OPERATION_TYPE_PREFETCH 6\r
+///@}\r
+\r
+///\r
+/// IA32/X64 TLB Check Structure\r
+///\r
+typedef struct {\r
+ UINT64 ValidFields:16;\r
+ UINT64 TransactionType:2;\r
+ UINT64 Operation:4;\r
+ UINT64 Level:3;\r
+ UINT64 ContextCorrupt:1;\r
+ UINT64 ErrorUncorrected:1;\r
+ UINT64 PreciseIp:1;\r
+ UINT64 RestartableIp:1;\r
+ UINT64 Overflow:1;\r
+ UINT64 Resv1:34;\r
+} EFI_IA32_X64_TLB_CHECK_INFO;\r
+\r
+///\r
+/// The validation bit mask indicates which fields in the MS Check structure\r
+/// are valid.\r
+///@{\r
+#define EFI_BUS_CHECK_TRANSACTION_TYPE_VALID BIT0\r
+#define EFI_BUS_CHECK_OPERATION_VALID BIT1\r
+#define EFI_BUS_CHECK_LEVEL_VALID BIT2\r
+#define EFI_BUS_CHECK_CONTEXT_CORRUPT_VALID BIT3\r
+#define EFI_BUS_CHECK_UNCORRECTED_VALID BIT4\r
+#define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5\r
+#define EFI_BUS_CHECK_RESTARTABLE_VALID BIT6\r
+#define EFI_BUS_CHECK_OVERFLOW_VALID BIT7\r
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_VALID BIT8\r
+#define EFI_BUS_CHECK_TIME_OUT_VALID BIT9\r
+#define EFI_BUS_CHECK_ADDRESS_SPACE_VALID BIT10\r
+///@}\r
+\r
+///\r
+/// Type of cache error in the Bus Check structure\r
+///@{\r
+#define EFI_BUS_CHECK_ERROR_TYPE_INSTRUCTION 0\r
+#define EFI_BUS_CHECK_ERROR_TYPE_DATA_ACCESS 1\r
+#define EFI_BUS_CHECK_ERROR_TYPE_GENERIC 2\r
+///@}\r
+\r
+///\r
+/// Type of cache operation that caused the error in the Bus\r
+/// Check structure\r
+///@{\r
+#define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC 0\r
+#define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_READ 1\r
+#define EFI_BUS_CHECK_OPERATION_TYPE_GENERIC_WRITE 2\r
+#define EFI_BUS_CHECK_OPERATION_TYPE_DATA_READ 3\r
+#define EFI_BUS_CHECK_OPERATION_TYPE_DATA_WRITE 4\r
+#define EFI_BUS_CHECK_OPERATION_TYPE_INST_FETCH 5\r
+#define EFI_BUS_CHECK_OPERATION_TYPE_PREFETCH 6\r
+///@}\r
+\r
+///\r
+/// Type of Participation\r
+///@{\r
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_REQUEST 0\r
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_RESPONDED 1\r
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_OBSERVED 2\r
+#define EFI_BUS_CHECK_PARTICIPATION_TYPE_GENERIC 3\r
+///@}\r
+\r
+///\r
+/// Type of Address Space\r
+///@{\r
+#define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_MEMORY 0\r
+#define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_RESERVED 1\r
+#define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_IO 2\r
+#define EFI_BUS_CHECK_ADDRESS_SPACE_TYPE_OTHER 3\r
+///@}\r
+\r
+///\r
+/// IA32/X64 Bus Check Structure\r
+///\r
+typedef struct {\r
+ UINT64 ValidFields:16;\r
+ UINT64 TransactionType:2;\r
+ UINT64 Operation:4;\r
+ UINT64 Level:3;\r
+ UINT64 ContextCorrupt:1;\r
+ UINT64 ErrorUncorrected:1;\r
+ UINT64 PreciseIp:1;\r
+ UINT64 RestartableIp:1;\r
+ UINT64 Overflow:1;\r
+ UINT64 ParticipationType:2;\r
+ UINT64 TimeOut:1;\r
+ UINT64 AddressSpace:2;\r
+ UINT64 Resv1:29;\r
+} EFI_IA32_X64_BUS_CHECK_INFO;\r
+\r
+///\r
+/// The validation bit mask indicates which fields in the MS Check structure\r
+/// are valid.\r
+///@{\r
+#define EFI_MS_CHECK_ERROR_TYPE_VALID BIT0\r
+#define EFI_MS_CHECK_CONTEXT_CORRUPT_VALID BIT1\r
+#define EFI_MS_CHECK_UNCORRECTED_VALID BIT2\r
+#define EFI_MS_CHECK_PRECISE_IP_VALID BIT3\r
+#define EFI_MS_CHECK_RESTARTABLE_VALID BIT4\r
+#define EFI_MS_CHECK_OVERFLOW_VALID BIT5\r
+///@}\r
+\r
+///\r
+/// Error type identifies the operation that caused the error.\r
+///@{\r
+#define EFI_MS_CHECK_ERROR_TYPE_NO 0\r
+#define EFI_MS_CHECK_ERROR_TYPE_UNCLASSIFIED 1\r
+#define EFI_MS_CHECK_ERROR_TYPE_MICROCODE_PARITY 2\r
+#define EFI_MS_CHECK_ERROR_TYPE_EXTERNAL 3\r
+#define EFI_MS_CHECK_ERROR_TYPE_FRC 4\r
+#define EFI_MS_CHECK_ERROR_TYPE_INTERNAL_UNCLASSIFIED 5\r
+///@}\r
+\r
+///\r
+/// IA32/X64 MS Check Field Description\r
+///\r
+typedef struct {\r
+ UINT64 ValidFields:16;\r
+ UINT64 ErrorType:3;\r
+ UINT64 ContextCorrupt:1;\r
+ UINT64 ErrorUncorrected:1;\r
+ UINT64 PreciseIp:1;\r
+ UINT64 RestartableIp:1;\r
+ UINT64 Overflow:1;\r
+ UINT64 Resv1:40;\r
+} EFI_IA32_X64_MS_CHECK_INFO;\r
+\r
+///\r
+/// IA32/X64 Check Information Item\r
+///\r
+typedef union {\r
+ EFI_IA32_X64_CACHE_CHECK_INFO CacheCheck;\r
+ EFI_IA32_X64_TLB_CHECK_INFO TlbCheck;\r
+ EFI_IA32_X64_BUS_CHECK_INFO BusCheck;\r
+ EFI_IA32_X64_MS_CHECK_INFO MsCheck;\r
+ UINT64 Data64;\r
+} EFI_IA32_X64_CHECK_INFO_ITEM;\r
+\r
+///\r
+/// The validation bit mask indicates which fields in the IA32/X64 Processor Error\r
+/// Information Structure are valid.\r
+///@{\r
+#define EFI_IA32_X64_ERROR_PROC_CHECK_INFO_VALID BIT0\r
+#define EFI_IA32_X64_ERROR_PROC_TARGET_ADDR_VALID BIT1\r
+#define EFI_IA32_X64_ERROR_PROC_REQUESTER_ID_VALID BIT2\r
+#define EFI_IA32_X64_ERROR_PROC_RESPONDER_ID_VALID BIT3\r
+#define EFI_IA32_X64_ERROR_PROC_INST_IP_VALID BIT4\r
+///@}\r
+\r
+///\r
+/// IA32/X64 Processor Error Information Structure\r
+///\r
+typedef struct {\r
+ EFI_GUID ErrorType;\r
+ UINT64 ValidFields;\r
+ EFI_IA32_X64_CHECK_INFO_ITEM CheckInfo;\r
+ UINT64 TargetId;\r
+ UINT64 RequestorId;\r
+ UINT64 ResponderId;\r
+ UINT64 InstructionIP;\r
+} EFI_IA32_X64_PROCESS_ERROR_INFO;\r
+\r
+///\r
+/// IA32/X64 Processor Context Information Structure\r
+///\r
+typedef struct {\r
+ UINT16 RegisterType;\r
+ UINT16 ArraySize;\r
+ UINT32 MsrAddress;\r
+ UINT64 MmRegisterAddress;\r
+ //\r
+ // This field will provide the contents of the actual registers or raw data.\r
+ // The number of Registers or size of the raw data reported is determined\r
+ // by (Array Size / 8) or otherwise specified by the context structure type\r
+ // definition.\r
+ //\r
+} EFI_IA32_X64_PROCESSOR_CONTEXT_INFO;\r
+\r
+///\r
+/// Register Context Type\r
+///@{\r
+#define EFI_REG_CONTEXT_TYPE_UNCLASSIFIED 0x0000\r
+#define EFI_REG_CONTEXT_TYPE_MSR 0x0001\r
+#define EFI_REG_CONTEXT_TYPE_IA32 0x0002\r
+#define EFI_REG_CONTEXT_TYPE_X64 0x0003\r
+#define EFI_REG_CONTEXT_TYPE_FXSAVE 0x0004\r
+#define EFI_REG_CONTEXT_TYPE_DR_IA32 0x0005\r
+#define EFI_REG_CONTEXT_TYPE_DR_X64 0x0006\r
+#define EFI_REG_CONTEXT_TYPE_MEM_MAP 0x0007\r
+///@}\r
+\r
+///\r
+/// IA32 Register State\r
+///\r
+typedef struct {\r
+ UINT32 Eax;\r
+ UINT32 Ebx;\r
+ UINT32 Ecx;\r
+ UINT32 Edx;\r
+ UINT32 Esi;\r
+ UINT32 Edi;\r
+ UINT32 Ebp;\r
+ UINT32 Esp;\r
+ UINT16 Cs;\r
+ UINT16 Ds;\r
+ UINT16 Ss;\r
+ UINT16 Es;\r
+ UINT16 Fs;\r
+ UINT16 Gs;\r
+ UINT32 Eflags;\r
+ UINT32 Eip;\r
+ UINT32 Cr0;\r
+ UINT32 Cr1;\r
+ UINT32 Cr2;\r
+ UINT32 Cr3;\r
+ UINT32 Cr4;\r
+ UINT32 Gdtr[2];\r
+ UINT32 Idtr[2];\r
+ UINT16 Ldtr;\r
+ UINT16 Tr;\r
+} EFI_CONTEXT_IA32_REGISTER_STATE;\r
+\r
+///\r
+/// X64 Register State\r
+///\r
+typedef struct {\r
+ UINT64 Rax;\r
+ UINT64 Rbx;\r
+ UINT64 Rcx;\r
+ UINT64 Rdx;\r
+ UINT64 Rsi;\r
+ UINT64 Rdi;\r
+ UINT64 Rbp;\r
+ UINT64 Rsp;\r
+ UINT64 R8;\r
+ UINT64 R9;\r
+ UINT64 R10;\r
+ UINT64 R11;\r
+ UINT64 R12;\r
+ UINT64 R13;\r
+ UINT64 R14;\r
+ UINT64 R15;\r
+ UINT16 Cs;\r
+ UINT16 Ds;\r
+ UINT16 Ss;\r
+ UINT16 Es;\r
+ UINT16 Fs;\r
+ UINT16 Gs;\r
+ UINT32 Resv1;\r
+ UINT64 Rflags;\r
+ UINT64 Rip;\r
+ UINT64 Cr0;\r
+ UINT64 Cr1;\r
+ UINT64 Cr2;\r
+ UINT64 Cr3;\r
+ UINT64 Cr4;\r
+ UINT64 Gdtr[2];\r
+ UINT64 Idtr[2];\r
+ UINT16 Ldtr;\r
+ UINT16 Tr;\r
+} EFI_CONTEXT_X64_REGISTER_STATE;\r
+\r
+///\r
+/// The validation bit mask indicates each of the following field is in IA32/X64\r
+/// Processor Error Section.\r
+///\r
+typedef struct {\r
+ UINT64 ApicIdValid:1;\r
+ UINT64 CpuIdInforValid:1;\r
+ UINT64 ErrorInfoNum:6;\r
+ UINT64 ContextNum:6;\r
+ UINT64 Resv1:50;\r
+} EFI_IA32_X64_VALID_BITS;\r
+\r
+#endif\r
+\r
+///\r
+/// Error Status Fields\r
+///\r
+typedef struct {\r
+ UINT64 Resv1:8;\r
+ UINT64 Type:8;\r
+ UINT64 AddressSignal:1; ///< Error in Address signals or in Address portion of transaction\r
+ UINT64 ControlSignal:1; ///< Error in Control signals or in Control portion of transaction\r
+ UINT64 DataSignal:1; ///< Error in Data signals or in Data portion of transaction\r
+ UINT64 DetectedByResponder:1; ///< Error detected by responder\r
+ UINT64 DetectedByRequester:1; ///< Error detected by requestor\r
+ UINT64 FirstError:1; ///< First Error in the sequence - option field\r
+ UINT64 OverflowNotLogged:1; ///< Additional errors were not logged due to lack of resources\r
+ UINT64 Resv2:41;\r
+} EFI_GENERIC_ERROR_STATUS;\r
+\r
+///\r
+/// Error Type\r
+///\r
+typedef enum {\r
+ ///\r
+ /// General Internal errors\r
+ ///\r
+ ErrorInternal = 1,\r
+ ErrorBus = 16,\r
+ ///\r
+ /// Component Internal errors\r
+ ///\r
+ ErrorMemStorage = 4, // Error in memory device\r
+ ErrorTlbStorage = 5, // TLB error in cache\r
+ ErrorCacheStorage = 6,\r
+ ErrorFunctionalUnit = 7,\r
+ ErrorSelftest = 8,\r
+ ErrorOverflow = 9,\r
+ ///\r
+ /// Bus internal errors\r
+ ///\r
+ ErrorVirtualMap = 17,\r
+ ErrorAccessInvalid = 18, // Improper access\r
+ ErrorUnimplAccess = 19, // Unimplemented memory access\r
+ ErrorLossOfLockstep = 20,\r
+ ErrorResponseInvalid= 21, // Response not associated with request\r
+ ErrorParity = 22,\r
+ ErrorProtocol = 23,\r
+ ErrorPath = 24, // Detected path error\r
+ ErrorTimeout = 25, // Bus timeout\r
+ ErrorPoisoned = 26 // Read data poisoned\r
+} EFI_GENERIC_ERROR_STATUS_ERROR_TYPE;\r
+\r
+///\r
+/// Validation bit mask indicates which fields in the memory error record are valid\r
+/// in Memory Error section\r
+///@{\r
+#define EFI_PLATFORM_MEMORY_ERROR_STATUS_VALID BIT0\r
+#define EFI_PLATFORM_MEMORY_PHY_ADDRESS_VALID BIT1\r
+#define EFI_PLATFORM_MEMORY_PHY_ADDRESS_MASK_VALID BIT2\r
+#define EFI_PLATFORM_MEMORY_NODE_VALID BIT3\r
+#define EFI_PLATFORM_MEMORY_CARD_VALID BIT4\r
+#define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5\r
+#define EFI_PLATFORM_MEMORY_BANK_VALID BIT6\r
+#define EFI_PLATFORM_MEMORY_DEVICE_VALID BIT7\r
+#define EFI_PLATFORM_MEMORY_ROW_VALID BIT8\r
+#define EFI_PLATFORM_MEMORY_COLUMN_VALID BIT9\r
+#define EFI_PLATFORM_MEMORY_BIT_POS_VALID BIT10\r
+#define EFI_PLATFORM_MEMORY_REQUESTOR_ID_VALID BIT11\r
+#define EFI_PLATFORM_MEMORY_RESPONDER_ID_VALID BIT12\r
+#define EFI_PLATFORM_MEMORY_TARGET_ID_VALID BIT13\r
+#define EFI_PLATFORM_MEMORY_ERROR_TYPE_VALID BIT14\r
+#define EFI_PLATFORM_MEMORY_ERROR_RANK_NUM_VALID BIT15\r
+#define EFI_PLATFORM_MEMORY_ERROR_CARD_HANDLE_VALID BIT16\r
+#define EFI_PLATFORM_MEMORY_ERROR_MODULE_HANDLE_VALID BIT17\r
+///@}\r
+\r
+///\r
+/// Memory Error Type identifies the type of error that occurred in Memory\r
+/// Error section\r
+///@{\r
+#define EFI_PLATFORM_MEMORY_ERROR_UNKNOWN 0x00\r
+#define EFI_PLATFORM_MEMORY_ERROR_NONE 0x01\r
+#define EFI_PLATFORM_MEMORY_ERROR_SINGLEBIT_ECC 0x02\r
+#define EFI_PLATFORM_MEMORY_ERROR_MLTIBIT_ECC 0x03\r
+#define EFI_PLATFORM_MEMORY_ERROR_SINGLESYMBOLS_CHIPKILL 0x04\r
+#define EFI_PLATFORM_MEMORY_ERROR_MULTISYMBOL_CHIPKILL 0x05\r
+#define EFI_PLATFORM_MEMORY_ERROR_MATER_ABORT 0x06\r
+#define EFI_PLATFORM_MEMORY_ERROR_TARGET_ABORT 0x07\r
+#define EFI_PLATFORM_MEMORY_ERROR_PARITY 0x08\r
+#define EFI_PLATFORM_MEMORY_ERROR_WDT 0x09\r
+#define EFI_PLATFORM_MEMORY_ERROR_INVALID_ADDRESS 0x0A\r
+#define EFI_PLATFORM_MEMORY_ERROR_MIRROR_FAILED 0x0B\r
+#define EFI_PLATFORM_MEMORY_ERROR_SPARING 0x0C\r
+#define EFI_PLATFORM_MEMORY_ERROR_SCRUB_CORRECTED 0x0D\r
+#define EFI_PLATFORM_MEMORY_ERROR_SCRUB_UNCORRECTED 0x0E\r
+#define EFI_PLATFORM_MEMORY_ERROR_MEMORY_MAP_EVENT 0x0F\r
+///@}\r
+\r
+///\r
+/// Memory Error Section\r
+///\r
+typedef struct {\r
+ UINT64 ValidFields;\r
+ EFI_GENERIC_ERROR_STATUS ErrorStatus;\r
+ UINT64 PhysicalAddress; // Error physical address\r
+ UINT64 PhysicalAddressMask; // Grnaularity\r
+ UINT16 Node; // Node #\r
+ UINT16 Card;\r
+ UINT16 ModuleRank; // Module or Rank#\r
+ UINT16 Bank;\r
+ UINT16 Device;\r
+ UINT16 Row;\r
+ UINT16 Column;\r
+ UINT16 BitPosition;\r
+ UINT64 RequestorId;\r
+ UINT64 ResponderId;\r
+ UINT64 TargetId;\r
+ UINT8 ErrorType;\r
+ UINT8 Resv1;\r
+ UINT16 RankNum;\r
+ UINT16 CardHandle;\r
+ UINT16 ModuleHandle;\r
+} EFI_PLATFORM_MEMORY_ERROR_DATA;\r
+\r
+///\r
+/// Validation bits mask indicates which of the following fields is valid\r
+/// in PCI Express Error Record.\r
+///@{\r
+#define EFI_PCIE_ERROR_PORT_TYPE_VALID BIT0\r
+#define EFI_PCIE_ERROR_VERSION_VALID BIT1\r
+#define EFI_PCIE_ERROR_COMMAND_STATUS_VALID BIT2\r
+#define EFI_PCIE_ERROR_DEVICE_ID_VALID BIT3\r
+#define EFI_PCIE_ERROR_SERIAL_NO_VALID BIT4\r
+#define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5\r
+#define EFI_PCIE_ERROR_CAPABILITY_INFO_VALID BIT6\r
+#define EFI_PCIE_ERROR_AER_INFO_VALID BIT7\r
+///@}\r
+\r
+///\r
+/// PCIe Device/Port Type as defined in the PCI Express capabilities register\r
+///@{\r
+#define EFI_PCIE_ERROR_PORT_PCIE_ENDPOINT 0x00000000\r
+#define EFI_PCIE_ERROR_PORT_PCI_ENDPOINT 0x00000001\r
+#define EFI_PCIE_ERROR_PORT_ROOT_PORT 0x00000004\r
+#define EFI_PCIE_ERROR_PORT_UPSWITCH_PORT 0x00000005\r
+#define EFI_PCIE_ERROR_PORT_DOWNSWITCH_PORT 0x00000006\r
+#define EFI_PCIE_ERROR_PORT_PCIE_TO_PCI_BRIDGE 0x00000007\r
+#define EFI_PCIE_ERROR_PORT_PCI_TO_PCIE_BRIDGE 0x00000008\r
+#define EFI_PCIE_ERROR_PORT_ROOT_INT_ENDPOINT 0x00000009\r
+#define EFI_PCIE_ERROR_PORT_ROOT_EVENT_COLLECTOR 0x0000000A\r
+///@}\r
+\r
+///\r
+/// PCI Slot number\r
+///\r
+typedef struct {\r
+ UINT16 Resv1:3;\r
+ UINT16 Number:13;\r
+} EFI_GENERIC_ERROR_PCI_SLOT;\r
+\r
+///\r
+/// PCIe Root Port PCI/bridge PCI compatible device number and\r
+/// bus number information to uniquely identify the root port or\r
+/// bridge. Default values for both the bus numbers is zero.\r
+///\r
+typedef struct {\r
+ UINT16 VendorId;\r
+ UINT16 DeviceId;\r
+ UINT8 ClassCode[3];\r
+ UINT8 Function;\r
+ UINT8 Device;\r
+ UINT16 Segment;\r
+ UINT8 PrimaryOrDeviceBus;\r
+ UINT8 SecondaryBus;\r
+ EFI_GENERIC_ERROR_PCI_SLOT Slot;\r
+ UINT8 Resv1;\r
+} EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID;\r
+\r
+///\r
+/// PCIe Capability Structure\r
+///\r
+typedef struct {\r
+ UINT8 PcieCap[60];\r
+} EFI_PCIE_ERROR_DATA_CAPABILITY;\r
+\r
+///\r
+/// PCIe Advanced Error Reporting Extended Capability Structure.\r
+///\r
+typedef struct {\r
+ UINT8 PcieAer[96];\r
+} EFI_PCIE_ERROR_DATA_AER;\r
+\r
+///\r
+/// PCI Express Error Record\r
+///\r
+typedef struct {\r
+ UINT64 ValidFields;\r
+ UINT32 PortType;\r
+ UINT32 Version;\r
+ UINT32 CommandStatus;\r
+ UINT32 Resv2;\r
+ EFI_GENERIC_ERROR_PCIE_DEV_BRIDGE_ID DevBridge;\r
+ UINT64 SerialNo;\r
+ UINT32 BridgeControlStatus;\r
+ EFI_PCIE_ERROR_DATA_CAPABILITY Capability;\r
+ EFI_PCIE_ERROR_DATA_AER AerInfo;\r
+} EFI_PCIE_ERROR_DATA;\r
+\r
+///\r
+/// Validation bits Indicates which of the following fields is valid\r
+/// in PCI/PCI-X Bus Error Section.\r
+///@{\r
+#define EFI_PCI_PCIX_BUS_ERROR_STATUS_VALID BIT0\r
+#define EFI_PCI_PCIX_BUS_ERROR_TYPE_VALID BIT1\r
+#define EFI_PCI_PCIX_BUS_ERROR_BUS_ID_VALID BIT2\r
+#define EFI_PCI_PCIX_BUS_ERROR_BUS_ADDRESS_VALID BIT3\r
+#define EFI_PCI_PCIX_BUS_ERROR_BUS_DATA_VALID BIT4\r
+#define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5\r
+#define EFI_PCI_PCIX_BUS_ERROR_REQUESTOR_ID_VALID BIT6\r
+#define EFI_PCI_PCIX_BUS_ERROR_COMPLETER_ID_VALID BIT7\r
+#define EFI_PCI_PCIX_BUS_ERROR_TARGET_ID_VALID BIT8\r
+///@}\r
+\r
+///\r
+/// PCI Bus Error Type in PCI/PCI-X Bus Error Section\r
+///@{\r
+#define EFI_PCI_PCIX_BUS_ERROR_UNKNOWN 0x0000\r
+#define EFI_PCI_PCIX_BUS_ERROR_DATA_PARITY 0x0001\r
+#define EFI_PCI_PCIX_BUS_ERROR_SYSTEM 0x0002\r
+#define EFI_PCI_PCIX_BUS_ERROR_MASTER_ABORT 0x0003\r
+#define EFI_PCI_PCIX_BUS_ERROR_BUS_TIMEOUT 0x0004\r
+#define EFI_PCI_PCIX_BUS_ERROR_MASTER_DATA_PARITY 0x0005\r
+#define EFI_PCI_PCIX_BUS_ERROR_ADDRESS_PARITY 0x0006\r
+#define EFI_PCI_PCIX_BUS_ERROR_COMMAND_PARITY 0x0007\r
+///@}\r
+\r
+///\r
+/// PCI/PCI-X Bus Error Section\r
+///\r
+typedef struct {\r
+ UINT64 ValidFields;\r
+ EFI_GENERIC_ERROR_STATUS ErrorStatus;\r
+ UINT16 Type;\r
+ UINT16 BusId;\r
+ UINT32 Resv2;\r
+ UINT64 BusAddress;\r
+ UINT64 BusData;\r
+ UINT64 BusCommand;\r
+ UINT64 RequestorId;\r
+ UINT64 ResponderId;\r
+ UINT64 TargetId;\r
+} EFI_PCI_PCIX_BUS_ERROR_DATA;\r
+\r
+///\r
+/// Validation bits Indicates which of the following fields is valid\r
+/// in PCI/PCI-X Component Error Section.\r
+///@{\r
+#define EFI_PCI_PCIX_DEVICE_ERROR_STATUS_VALID BIT0\r
+#define EFI_PCI_PCIX_DEVICE_ERROR_ID_INFO_VALID BIT1\r
+#define EFI_PCI_PCIX_DEVICE_ERROR_MEM_NUM_VALID BIT2\r
+#define EFI_PCI_PCIX_DEVICE_ERROR_IO_NUM_VALID BIT3\r
+#define EFI_PCI_PCIX_DEVICE_ERROR_REG_DATA_PAIR_VALID BIT4\r
+///@}\r
+\r
+///\r
+/// PCI/PCI-X Device Identification Information\r
+///\r
+typedef struct {\r
+ UINT16 VendorId;\r
+ UINT16 DeviceId;\r
+ UINT8 ClassCode[3];\r
+ UINT8 Function;\r
+ UINT8 Device;\r
+ UINT8 Bus;\r
+ UINT8 Segment;\r
+ UINT8 Resv1;\r
+ UINT32 Resv2;\r
+} EFI_GENERIC_ERROR_PCI_DEVICE_ID;\r
+\r
+///\r
+/// Identifies the type of firmware error record\r
+///\r
+#define EFI_FIRMWARE_ERROR_TYPE_IPF_SAL 0x00\r
+\r
+///\r
+/// Firmware Error Record Section\r
+///\r
+typedef struct {\r
+ UINT8 ErrorType;\r
+ UINT8 Resv1[7];\r
+ UINT64 RecordId;\r
+} EFI_FIRMWARE_ERROR_DATA;\r
+\r
+///\r
+/// Fault Reason in DMAr Generic Error Section\r
+///@{\r
+#define EFI_DMA_FAULT_REASON_TABLE_ENTRY_NOT_PRESENT 0x01\r
+#define EFI_DMA_FAULT_REASON_TABLE_ENTRY_INVALID 0x02\r
+#define EFI_DMA_FAULT_REASON_ACCESS_MAPPING_TABLE_ERROR 0x03\r
+#define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_MAPPING_TABLE 0x04\r
+#define EFI_DMA_FAULT_REASON_ACCESS_ADDR_OUT_OF_SPACE 0x05\r
+#define EFI_DMA_FAULT_REASON_INVALID_ACCESS 0x06\r
+#define EFI_DMA_FAULT_REASON_INVALID_REQUEST 0x07\r
+#define EFI_DMA_FAULT_REASON_ACCESS_TRANSLATE_TABLE_ERROR 0x08\r
+#define EFI_DMA_FAULT_REASON_RESV_BIT_ERROR_IN_TRANSLATE_TABLE 0x09\r
+#define EFI_DMA_FAULT_REASON_INVALID_COMMAOND 0x0A\r
+#define EFI_DMA_FAULT_REASON_ACCESS_COMMAND_BUFFER_ERROR 0x0B\r
+///@}\r
+\r
+///\r
+/// DMA access type in DMAr Generic Error Section\r
+///@{\r
+#define EFI_DMA_ACCESS_TYPE_READ 0x00\r
+#define EFI_DMA_ACCESS_TYPE_WRITE 0x01\r
+///@}\r
+\r
+///\r
+/// DMA address type in DMAr Generic Error Section\r
+///@{\r
+#define EFI_DMA_ADDRESS_UNTRANSLATED 0x00\r
+#define EFI_DMA_ADDRESS_TRANSLATION 0x01\r
+///@}\r
+\r
+///\r
+/// Architecture type in DMAr Generic Error Section\r
+///@{\r
+#define EFI_DMA_ARCH_TYPE_VT 0x01\r
+#define EFI_DMA_ARCH_TYPE_IOMMU 0x02\r
+///@}\r
+\r
+///\r
+/// DMAr Generic Error Section\r
+///\r
+typedef struct {\r
+ UINT16 RequesterId;\r
+ UINT16 SegmentNumber;\r
+ UINT8 FaultReason;\r
+ UINT8 AccessType;\r
+ UINT8 AddressType;\r
+ UINT8 ArchType;\r
+ UINT64 DeviceAddr;\r
+ UINT8 Resv1[16];\r
+} EFI_DMAR_GENERIC_ERROR_DATA;\r
+\r
+///\r
+/// Intel VT for Directed I/O specific DMAr Errors\r
+///\r
+typedef struct {\r
+ UINT8 Version;\r
+ UINT8 Revision;\r
+ UINT8 OemId[6];\r
+ UINT64 Capability;\r
+ UINT64 CapabilityEx;\r
+ UINT32 GlobalCommand;\r
+ UINT32 GlobalStatus;\r
+ UINT32 FaultStatus;\r
+ UINT8 Resv1[12];\r
+ UINT64 FaultRecord[2];\r
+ UINT64 RootEntry[2];\r
+ UINT64 ContextEntry[2];\r
+ UINT64 PteL6;\r
+ UINT64 PteL5;\r
+ UINT64 PteL4;\r
+ UINT64 PteL3;\r
+ UINT64 PteL2;\r
+ UINT64 PteL1;\r
+} EFI_DIRECTED_IO_DMAR_ERROR_DATA;\r
+\r
+///\r
+/// IOMMU specific DMAr Errors\r
+///\r
+typedef struct {\r
+ UINT8 Revision;\r
+ UINT8 Resv1[7];\r
+ UINT64 Control;\r
+ UINT64 Status;\r
+ UINT8 Resv2[8];\r
+ UINT64 EventLogEntry[2];\r
+ UINT8 Resv3[16];\r
+ UINT64 DeviceTableEntry[4];\r
+ UINT64 PteL6;\r
+ UINT64 PteL5;\r
+ UINT64 PteL4;\r
+ UINT64 PteL3;\r
+ UINT64 PteL2;\r
+ UINT64 PteL1;\r
+} EFI_IOMMU_DMAR_ERROR_DATA;\r
+\r
+#pragma pack()\r
+\r
+extern EFI_GUID gEfiEventNotificationTypeCmcGuid;\r
+extern EFI_GUID gEfiEventNotificationTypeCpeGuid;\r
+extern EFI_GUID gEfiEventNotificationTypeMceGuid;\r
+extern EFI_GUID gEfiEventNotificationTypePcieGuid;\r
+extern EFI_GUID gEfiEventNotificationTypeInitGuid;\r
+extern EFI_GUID gEfiEventNotificationTypeNmiGuid;\r
+extern EFI_GUID gEfiEventNotificationTypeBootGuid;\r
+extern EFI_GUID gEfiEventNotificationTypeDmarGuid;\r
+\r
+extern EFI_GUID gEfiProcessorGenericErrorSectionGuid;\r
+extern EFI_GUID gEfiProcessorSpecificErrorSectionGuid;\r
+extern EFI_GUID gEfiPlatformMemoryErrorSectionGuid;\r
+extern EFI_GUID gEfiPcieErrorSectionGuid;\r
+extern EFI_GUID gEfiFirmwareErrorSectionGuid;\r
+extern EFI_GUID gEfiPciBusErrorSectionGuid;\r
+extern EFI_GUID gEfiPciDevErrorSectionGuid;\r
+extern EFI_GUID gEfiDMArGenericErrorSectionGuid;\r
+extern EFI_GUID gEfiDirectedIoDMArErrorSectionGuid;\r
+extern EFI_GUID gEfiIommuDMArErrorSectionGuid;\r
+\r
+#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
+///\r
+/// IA32 and x64 Specific definitions.\r
+///\r
+\r
+extern EFI_GUID gEfiIa32X64ErrorTypeCacheCheckGuid;\r
+extern EFI_GUID gEfiIa32X64ErrorTypeTlbCheckGuid;\r
+extern EFI_GUID gEfiIa32X64ErrorTypeBusCheckGuid;\r
+extern EFI_GUID gEfiIa32X64ErrorTypeMsCheckGuid;\r
+\r
+#endif\r
+\r
+#endif\r
projects / mirror_edk2.git / blobdiff