added newline after brief summary

[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi20.h

diff --git a/MdePkg/Include/IndustryStandard/Acpi20.h b/MdePkg/Include/IndustryStandard/Acpi20.h
index a0642bc2a136515fe61eef7ec246396a5d985c33..bf529e499d7a1bb87414a9658627932045cb449d 100644 (file)
--- a/MdePkg/Include/IndustryStandard/Acpi20.h
+++ b/MdePkg/Include/IndustryStandard/Acpi20.h
@@ -1,5 +1,5 @@
 /** @file   \r
-       ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
+  ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
 \r
   Copyright (c) 2006 - 2008, Intel Corporation\r
   All rights reserved. This program and the accompanying materials                          \r
@@ -160,31 +160,31 @@ typedef struct {
 ///\r
 #define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03\r
 \r
-///\r
-/// Fixed ACPI Description Table Boot Architecture Flags\r
-/// All other bits are reserved and must be set to 0.\r
-///\r
-#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)\r
-#define EFI_ACPI_2_0_8042           (1 << 1)\r
+//\r
+// Fixed ACPI Description Table Boot Architecture Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_2_0_LEGACY_DEVICES          BIT0\r
+#define EFI_ACPI_2_0_8042                    BIT1\r
 \r
 //\r
 // Fixed ACPI Description Table Fixed Feature Flags\r
 // All other bits are reserved and must be set to 0.\r
 //\r
-#define EFI_ACPI_2_0_WBINVD         (1 << 0)\r
-#define EFI_ACPI_2_0_WBINVD_FLUSH   (1 << 1)\r
-#define EFI_ACPI_2_0_PROC_C1        (1 << 2)\r
-#define EFI_ACPI_2_0_P_LVL2_UP      (1 << 3)\r
-#define EFI_ACPI_2_0_PWR_BUTTON     (1 << 4)\r
-#define EFI_ACPI_2_0_SLP_BUTTON     (1 << 5)\r
-#define EFI_ACPI_2_0_FIX_RTC        (1 << 6)\r
-#define EFI_ACPI_2_0_RTC_S4         (1 << 7)\r
-#define EFI_ACPI_2_0_TMR_VAL_EXT    (1 << 8)\r
-#define EFI_ACPI_2_0_DCK_CAP        (1 << 9)\r
-#define EFI_ACPI_2_0_RESET_REG_SUP  (1 << 10)\r
-#define EFI_ACPI_2_0_SEALED_CASE    (1 << 11)\r
-#define EFI_ACPI_2_0_HEADLESS       (1 << 12)\r
-#define EFI_ACPI_2_0_CPU_SW_SLP     (1 << 13)\r
+#define EFI_ACPI_2_0_WBINVD                  BIT0\r
+#define EFI_ACPI_2_0_WBINVD_FLUSH            BIT1\r
+#define EFI_ACPI_2_0_PROC_C1                 BIT2\r
+#define EFI_ACPI_2_0_P_LVL2_UP               BIT3\r
+#define EFI_ACPI_2_0_PWR_BUTTON              BIT4\r
+#define EFI_ACPI_2_0_SLP_BUTTON              BIT5\r
+#define EFI_ACPI_2_0_FIX_RTC                 BIT6\r
+#define EFI_ACPI_2_0_RTC_S4                  BIT7\r
+#define EFI_ACPI_2_0_TMR_VAL_EXT             BIT8\r
+#define EFI_ACPI_2_0_DCK_CAP                 BIT9\r
+#define EFI_ACPI_2_0_RESET_REG_SUP           BIT10\r
+#define EFI_ACPI_2_0_SEALED_CASE             BIT11\r
+#define EFI_ACPI_2_0_HEADLESS                BIT12\r
+#define EFI_ACPI_2_0_CPU_SW_SLP              BIT13\r
 \r
 ///\r
 /// Firmware ACPI Control Structure\r
@@ -210,7 +210,7 @@ typedef struct {
 /// Firmware Control Structure Feature Flags\r
 /// All other bits are reserved and must be set to 0.\r
 ///\r
-#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)\r
+#define EFI_ACPI_2_0_S4BIOS_F        BIT0\r
 \r
 ///\r
 /// Multiple APIC Description Table header definition.  The rest of the table\r
@@ -231,7 +231,7 @@ typedef struct {
 /// Multiple APIC Flags\r
 /// All other bits are reserved and must be set to 0.\r
 ///\r
-#define EFI_ACPI_2_0_PCAT_COMPAT  (1 << 0)\r
+#define EFI_ACPI_2_0_PCAT_COMPAT          BIT0\r
 \r
 //\r
 // Multiple APIC Description Table APIC structure types\r
@@ -266,7 +266,7 @@ typedef struct {
 ///\r
 /// Local APIC Flags.  All other bits are reserved and must be 0.\r
 ///\r
-#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)\r
+#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED         BIT0\r
 \r
 ///\r
 /// IO APIC Structure\r