-/** @file \r
- ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
+/** @file\r
+ ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
\r
- Copyright (c) 2006 - 2008, Intel Corporation\r
- All rights reserved. This program and the accompanying materials \r
- are licensed and made available under the terms and conditions of the BSD License \r
- which accompanies this distribution. The full text of the license may be found at \r
- http://opensource.org/licenses/bsd-license.php \r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+ Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
**/\r
\r
#ifndef _ACPI_2_0_H_\r
\r
#include <IndustryStandard/Acpi10.h>\r
\r
+//\r
+// Define for Descriptor\r
+//\r
+#define ACPI_LARGE_GENERIC_REGISTER_DESCRIPTOR_NAME 0x02\r
+\r
+#define ACPI_GENERIC_REGISTER_DESCRIPTOR 0x82\r
+\r
+//\r
+// Ensure proper structure formats\r
+//\r
+#pragma pack(1)\r
+\r
+///\r
+/// Generic Register Descriptor\r
+///\r
+typedef PACKED struct {\r
+ ACPI_LARGE_RESOURCE_HEADER Header;\r
+ UINT8 AddressSpaceId;\r
+ UINT8 RegisterBitWidth;\r
+ UINT8 RegisterBitOffset;\r
+ UINT8 AddressSize;\r
+ UINT64 RegisterAddress;\r
+} EFI_ACPI_GENERIC_REGISTER_DESCRIPTOR;\r
+\r
+#pragma pack()\r
+\r
//\r
// Ensure proper structure formats\r
//\r
/// ACPI 2.0 Generic Address Space definition\r
///\r
typedef struct {\r
- UINT8 AddressSpaceId;\r
- UINT8 RegisterBitWidth;\r
- UINT8 RegisterBitOffset;\r
- UINT8 Reserved;\r
- UINT64 Address;\r
+ UINT8 AddressSpaceId;\r
+ UINT8 RegisterBitWidth;\r
+ UINT8 RegisterBitOffset;\r
+ UINT8 Reserved;\r
+ UINT64 Address;\r
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
\r
//\r
/// Root System Description Pointer Structure\r
///\r
typedef struct {\r
- UINT64 Signature;\r
- UINT8 Checksum;\r
- UINT8 OemId[6];\r
- UINT8 Revision;\r
- UINT32 RsdtAddress;\r
- UINT32 Length;\r
- UINT64 XsdtAddress;\r
- UINT8 ExtendedChecksum;\r
- UINT8 Reserved[3];\r
+ UINT64 Signature;\r
+ UINT8 Checksum;\r
+ UINT8 OemId[6];\r
+ UINT8 Revision;\r
+ UINT32 RsdtAddress;\r
+ UINT32 Length;\r
+ UINT64 XsdtAddress;\r
+ UINT8 ExtendedChecksum;\r
+ UINT8 Reserved[3];\r
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
\r
///\r
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
///\r
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
\r
///\r
/// Common table header, this prefaces all ACPI tables, including FACS, but\r
/// excluding the RSD PTR structure\r
///\r
typedef struct {\r
- UINT32 Signature;\r
- UINT32 Length;\r
+ UINT32 Signature;\r
+ UINT32 Length;\r
} EFI_ACPI_2_0_COMMON_HEADER;\r
\r
//\r
// Root System Description Table\r
-// No definition needed as it is a common description table header, the same with \r
+// No definition needed as it is a common description table header, the same with\r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT32 table pointers.\r
//\r
\r
///\r
/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
-#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
+#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
//\r
// Extended System Description Table\r
-// No definition needed as it is a common description table header, the same with \r
+// No definition needed as it is a common description table header, the same with\r
// EFI_ACPI_DESCRIPTION_HEADER, followed by a variable number of UINT64 table pointers.\r
//\r
\r
///\r
/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
-#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
+#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Fixed ACPI Description Table Structure (FADT)\r
///\r
typedef struct {\r
- EFI_ACPI_DESCRIPTION_HEADER Header;\r
- UINT32 FirmwareCtrl;\r
- UINT32 Dsdt;\r
- UINT8 Reserved0;\r
- UINT8 PreferredPmProfile;\r
- UINT16 SciInt;\r
- UINT32 SmiCmd;\r
- UINT8 AcpiEnable;\r
- UINT8 AcpiDisable;\r
- UINT8 S4BiosReq;\r
- UINT8 PstateCnt;\r
- UINT32 Pm1aEvtBlk;\r
- UINT32 Pm1bEvtBlk;\r
- UINT32 Pm1aCntBlk;\r
- UINT32 Pm1bCntBlk;\r
- UINT32 Pm2CntBlk;\r
- UINT32 PmTmrBlk;\r
- UINT32 Gpe0Blk;\r
- UINT32 Gpe1Blk;\r
- UINT8 Pm1EvtLen;\r
- UINT8 Pm1CntLen;\r
- UINT8 Pm2CntLen;\r
- UINT8 PmTmrLen;\r
- UINT8 Gpe0BlkLen;\r
- UINT8 Gpe1BlkLen;\r
- UINT8 Gpe1Base;\r
- UINT8 CstCnt;\r
- UINT16 PLvl2Lat;\r
- UINT16 PLvl3Lat;\r
- UINT16 FlushSize;\r
- UINT16 FlushStride;\r
- UINT8 DutyOffset;\r
- UINT8 DutyWidth;\r
- UINT8 DayAlrm;\r
- UINT8 MonAlrm;\r
- UINT8 Century;\r
- UINT16 IaPcBootArch;\r
- UINT8 Reserved1;\r
- UINT32 Flags;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
- UINT8 ResetValue;\r
- UINT8 Reserved2[3];\r
- UINT64 XFirmwareCtrl;\r
- UINT64 XDsdt;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 FirmwareCtrl;\r
+ UINT32 Dsdt;\r
+ UINT8 Reserved0;\r
+ UINT8 PreferredPmProfile;\r
+ UINT16 SciInt;\r
+ UINT32 SmiCmd;\r
+ UINT8 AcpiEnable;\r
+ UINT8 AcpiDisable;\r
+ UINT8 S4BiosReq;\r
+ UINT8 PstateCnt;\r
+ UINT32 Pm1aEvtBlk;\r
+ UINT32 Pm1bEvtBlk;\r
+ UINT32 Pm1aCntBlk;\r
+ UINT32 Pm1bCntBlk;\r
+ UINT32 Pm2CntBlk;\r
+ UINT32 PmTmrBlk;\r
+ UINT32 Gpe0Blk;\r
+ UINT32 Gpe1Blk;\r
+ UINT8 Pm1EvtLen;\r
+ UINT8 Pm1CntLen;\r
+ UINT8 Pm2CntLen;\r
+ UINT8 PmTmrLen;\r
+ UINT8 Gpe0BlkLen;\r
+ UINT8 Gpe1BlkLen;\r
+ UINT8 Gpe1Base;\r
+ UINT8 CstCnt;\r
+ UINT16 PLvl2Lat;\r
+ UINT16 PLvl3Lat;\r
+ UINT16 FlushSize;\r
+ UINT16 FlushStride;\r
+ UINT8 DutyOffset;\r
+ UINT8 DutyWidth;\r
+ UINT8 DayAlrm;\r
+ UINT8 MonAlrm;\r
+ UINT8 Century;\r
+ UINT16 IaPcBootArch;\r
+ UINT8 Reserved1;\r
+ UINT32 Flags;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
+ UINT8 ResetValue;\r
+ UINT8 Reserved2[3];\r
+ UINT64 XFirmwareCtrl;\r
+ UINT64 XDsdt;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
\r
///\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03\r
\r
-///\r
-/// Fixed ACPI Description Table Boot Architecture Flags\r
-/// All other bits are reserved and must be set to 0.\r
-///\r
-#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)\r
-#define EFI_ACPI_2_0_8042 (1 << 1)\r
+//\r
+// Fixed ACPI Description Table Preferred Power Management Profile\r
+//\r
+#define EFI_ACPI_2_0_PM_PROFILE_UNSPECIFIED 0\r
+#define EFI_ACPI_2_0_PM_PROFILE_DESKTOP 1\r
+#define EFI_ACPI_2_0_PM_PROFILE_MOBILE 2\r
+#define EFI_ACPI_2_0_PM_PROFILE_WORKSTATION 3\r
+#define EFI_ACPI_2_0_PM_PROFILE_ENTERPRISE_SERVER 4\r
+#define EFI_ACPI_2_0_PM_PROFILE_SOHO_SERVER 5\r
+#define EFI_ACPI_2_0_PM_PROFILE_APPLIANCE_PC 6\r
+\r
+//\r
+// Fixed ACPI Description Table Boot Architecture Flags\r
+// All other bits are reserved and must be set to 0.\r
+//\r
+#define EFI_ACPI_2_0_LEGACY_DEVICES BIT0\r
+#define EFI_ACPI_2_0_8042 BIT1\r
\r
//\r
// Fixed ACPI Description Table Fixed Feature Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
-#define EFI_ACPI_2_0_WBINVD (1 << 0)\r
-#define EFI_ACPI_2_0_WBINVD_FLUSH (1 << 1)\r
-#define EFI_ACPI_2_0_PROC_C1 (1 << 2)\r
-#define EFI_ACPI_2_0_P_LVL2_UP (1 << 3)\r
-#define EFI_ACPI_2_0_PWR_BUTTON (1 << 4)\r
-#define EFI_ACPI_2_0_SLP_BUTTON (1 << 5)\r
-#define EFI_ACPI_2_0_FIX_RTC (1 << 6)\r
-#define EFI_ACPI_2_0_RTC_S4 (1 << 7)\r
-#define EFI_ACPI_2_0_TMR_VAL_EXT (1 << 8)\r
-#define EFI_ACPI_2_0_DCK_CAP (1 << 9)\r
-#define EFI_ACPI_2_0_RESET_REG_SUP (1 << 10)\r
-#define EFI_ACPI_2_0_SEALED_CASE (1 << 11)\r
-#define EFI_ACPI_2_0_HEADLESS (1 << 12)\r
-#define EFI_ACPI_2_0_CPU_SW_SLP (1 << 13)\r
+#define EFI_ACPI_2_0_WBINVD BIT0\r
+#define EFI_ACPI_2_0_WBINVD_FLUSH BIT1\r
+#define EFI_ACPI_2_0_PROC_C1 BIT2\r
+#define EFI_ACPI_2_0_P_LVL2_UP BIT3\r
+#define EFI_ACPI_2_0_PWR_BUTTON BIT4\r
+#define EFI_ACPI_2_0_SLP_BUTTON BIT5\r
+#define EFI_ACPI_2_0_FIX_RTC BIT6\r
+#define EFI_ACPI_2_0_RTC_S4 BIT7\r
+#define EFI_ACPI_2_0_TMR_VAL_EXT BIT8\r
+#define EFI_ACPI_2_0_DCK_CAP BIT9\r
+#define EFI_ACPI_2_0_RESET_REG_SUP BIT10\r
+#define EFI_ACPI_2_0_SEALED_CASE BIT11\r
+#define EFI_ACPI_2_0_HEADLESS BIT12\r
+#define EFI_ACPI_2_0_CPU_SW_SLP BIT13\r
\r
///\r
/// Firmware ACPI Control Structure\r
///\r
typedef struct {\r
- UINT32 Signature;\r
- UINT32 Length;\r
- UINT32 HardwareSignature;\r
- UINT32 FirmwareWakingVector;\r
- UINT32 GlobalLock;\r
- UINT32 Flags;\r
- UINT64 XFirmwareWakingVector;\r
- UINT8 Version;\r
- UINT8 Reserved[31];\r
+ UINT32 Signature;\r
+ UINT32 Length;\r
+ UINT32 HardwareSignature;\r
+ UINT32 FirmwareWakingVector;\r
+ UINT32 GlobalLock;\r
+ UINT32 Flags;\r
+ UINT64 XFirmwareWakingVector;\r
+ UINT8 Version;\r
+ UINT8 Reserved[31];\r
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
\r
///\r
/// Firmware Control Structure Feature Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
-#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)\r
+#define EFI_ACPI_2_0_S4BIOS_F BIT0\r
\r
///\r
/// Multiple APIC Description Table header definition. The rest of the table\r
/// must be defined in a platform specific manner.\r
///\r
typedef struct {\r
- EFI_ACPI_DESCRIPTION_HEADER Header;\r
- UINT32 LocalApicAddress;\r
- UINT32 Flags;\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 LocalApicAddress;\r
+ UINT32 Flags;\r
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
\r
///\r
/// MADT Revision (as defined in ACPI 2.0 spec.)\r
///\r
-#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
+#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Multiple APIC Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
-#define EFI_ACPI_2_0_PCAT_COMPAT (1 << 0)\r
+#define EFI_ACPI_2_0_PCAT_COMPAT BIT0\r
\r
//\r
// Multiple APIC Description Table APIC structure types\r
/// Processor Local APIC Structure Definition\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT8 AcpiProcessorId;\r
- UINT8 ApicId;\r
- UINT32 Flags;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 AcpiProcessorId;\r
+ UINT8 ApicId;\r
+ UINT32 Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
\r
///\r
/// Local APIC Flags. All other bits are reserved and must be 0.\r
///\r
-#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)\r
+#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED BIT0\r
\r
///\r
/// IO APIC Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT8 IoApicId;\r
- UINT8 Reserved;\r
- UINT32 IoApicAddress;\r
- UINT32 GlobalSystemInterruptBase;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 IoApicId;\r
+ UINT8 Reserved;\r
+ UINT32 IoApicAddress;\r
+ UINT32 GlobalSystemInterruptBase;\r
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
\r
///\r
/// Interrupt Source Override Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT8 Bus;\r
- UINT8 Source;\r
- UINT32 GlobalSystemInterrupt;\r
- UINT16 Flags;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 Bus;\r
+ UINT8 Source;\r
+ UINT32 GlobalSystemInterrupt;\r
+ UINT16 Flags;\r
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
\r
///\r
/// Non-Maskable Interrupt Source Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT16 Flags;\r
- UINT32 GlobalSystemInterrupt;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Flags;\r
+ UINT32 GlobalSystemInterrupt;\r
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
\r
///\r
/// Local APIC NMI Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT8 AcpiProcessorId;\r
- UINT16 Flags;\r
- UINT8 LocalApicLint;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 AcpiProcessorId;\r
+ UINT16 Flags;\r
+ UINT8 LocalApicLint;\r
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
\r
///\r
/// Local APIC Address Override Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT16 Reserved;\r
- UINT64 LocalApicAddress;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Reserved;\r
+ UINT64 LocalApicAddress;\r
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
\r
///\r
/// IO SAPIC Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT8 IoApicId;\r
- UINT8 Reserved;\r
- UINT32 GlobalSystemInterruptBase;\r
- UINT64 IoSapicAddress;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 IoApicId;\r
+ UINT8 Reserved;\r
+ UINT32 GlobalSystemInterruptBase;\r
+ UINT64 IoSapicAddress;\r
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
\r
///\r
/// Local SAPIC Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT8 AcpiProcessorId;\r
- UINT8 LocalSapicId;\r
- UINT8 LocalSapicEid;\r
- UINT8 Reserved[3];\r
- UINT32 Flags;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT8 AcpiProcessorId;\r
+ UINT8 LocalSapicId;\r
+ UINT8 LocalSapicEid;\r
+ UINT8 Reserved[3];\r
+ UINT32 Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
\r
///\r
/// Platform Interrupt Sources Structure\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT16 Flags;\r
- UINT8 InterruptType;\r
- UINT8 ProcessorId;\r
- UINT8 ProcessorEid;\r
- UINT8 IoSapicVector;\r
- UINT32 GlobalSystemInterrupt;\r
- UINT32 Reserved;\r
+ UINT8 Type;\r
+ UINT8 Length;\r
+ UINT16 Flags;\r
+ UINT8 InterruptType;\r
+ UINT8 ProcessorId;\r
+ UINT8 ProcessorEid;\r
+ UINT8 IoSapicVector;\r
+ UINT32 GlobalSystemInterrupt;\r
+ UINT32 Reserved;\r
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
\r
///\r
/// Smart Battery Description Table (SBST)\r
///\r
typedef struct {\r
- EFI_ACPI_DESCRIPTION_HEADER Header;\r
- UINT32 WarningEnergyLevel;\r
- UINT32 LowEnergyLevel;\r
- UINT32 CriticalEnergyLevel;\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 WarningEnergyLevel;\r
+ UINT32 LowEnergyLevel;\r
+ UINT32 CriticalEnergyLevel;\r
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
\r
///\r
/// SBST Version (as defined in ACPI 2.0 spec.)\r
///\r
-#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
+#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Embedded Controller Boot Resources Table (ECDT)\r
/// a fully qualified reference to the name space object.\r
///\r
typedef struct {\r
- EFI_ACPI_DESCRIPTION_HEADER Header;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
- EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
- UINT32 Uid;\r
- UINT8 GpeBit;\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
+ EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
+ UINT32 Uid;\r
+ UINT8 GpeBit;\r
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
\r
///\r
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE SIGNATURE_32('S', 'L', 'I', 'T')\r
\r
///\r
-/// "SPCR" Serial Port Concole Redirection Table\r
+/// "SPCR" Serial Port Console Redirection Table\r
///\r
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE SIGNATURE_32('S', 'P', 'C', 'R')\r
\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE SIGNATURE_32('X', 'S', 'D', 'T')\r
\r
///\r
-/// "MCFG" Static Resource Affinity Table\r
+/// "MCFG" PCI Express Memory Mapped Configuration Space Base Address Description Table\r
///\r
#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE SIGNATURE_32('M', 'C', 'F', 'G')\r
\r