The return description for LibPcdSetx function is ambiguity. The actual meaning of...

[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi30.h

diff --git a/MdePkg/Include/IndustryStandard/Acpi30.h b/MdePkg/Include/IndustryStandard/Acpi30.h
index 75b5f8eba88d42405d44756f9f3c60fa5fcb7cc4..69a5e70ca900e73578e3a15c3134650538dc881b 100644 (file)
--- a/MdePkg/Include/IndustryStandard/Acpi30.h
+++ b/MdePkg/Include/IndustryStandard/Acpi30.h
@@ -185,36 +185,36 @@ typedef struct {
 // Fixed ACPI Description Table Boot Architecture Flags\r
 // All other bits are reserved and must be set to 0.\r
 //\r
-#define EFI_ACPI_3_0_LEGACY_DEVICES     (1 << 0)\r
-#define EFI_ACPI_3_0_8042               (1 << 1)\r
-#define EFI_ACPI_3_0_VGA_NOT_PRESENT    (1 << 2)\r
-#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED  (1 << 3)\r
-#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS (1 << 4)\r
+#define EFI_ACPI_3_0_LEGACY_DEVICES              BIT0\r
+#define EFI_ACPI_3_0_8042                        BIT1\r
+#define EFI_ACPI_3_0_VGA_NOT_PRESENT             BIT2\r
+#define EFI_ACPI_3_0_MSI_NOT_SUPPORTED           BIT3\r
+#define EFI_ACPI_3_0_PCIE_ASPM_CONTROLS          BIT4\r
 \r
 //\r
 // Fixed ACPI Description Table Fixed Feature Flags\r
 // All other bits are reserved and must be set to 0.\r
 //\r
-#define EFI_ACPI_3_0_WBINVD                   (1 << 0)\r
-#define EFI_ACPI_3_0_WBINVD_FLUSH             (1 << 1)\r
-#define EFI_ACPI_3_0_PROC_C1                  (1 << 2)\r
-#define EFI_ACPI_3_0_P_LVL2_UP                (1 << 3)\r
-#define EFI_ACPI_3_0_PWR_BUTTON               (1 << 4)\r
-#define EFI_ACPI_3_0_SLP_BUTTON               (1 << 5)\r
-#define EFI_ACPI_3_0_FIX_RTC                  (1 << 6)\r
-#define EFI_ACPI_3_0_RTC_S4                   (1 << 7)\r
-#define EFI_ACPI_3_0_TMR_VAL_EXT              (1 << 8)\r
-#define EFI_ACPI_3_0_DCK_CAP                  (1 << 9)\r
-#define EFI_ACPI_3_0_RESET_REG_SUP            (1 << 10)\r
-#define EFI_ACPI_3_0_SEALED_CASE              (1 << 11)\r
-#define EFI_ACPI_3_0_HEADLESS                 (1 << 12)\r
-#define EFI_ACPI_3_0_CPU_SW_SLP               (1 << 13)\r
-#define EFI_ACPI_3_0_PCI_EXP_WAK              (1 << 14)\r
-#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK       (1 << 15)\r
-#define EFI_ACPI_3_0_S4_RTC_STS_VALID         (1 << 16)\r
-#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE  (1 << 17)\r
-#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL (1 << 18)\r
-#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE (1 << 19)\r
+#define EFI_ACPI_3_0_WBINVD                                 BIT0\r
+#define EFI_ACPI_3_0_WBINVD_FLUSH                           BIT1\r
+#define EFI_ACPI_3_0_PROC_C1                                BIT2\r
+#define EFI_ACPI_3_0_P_LVL2_UP                              BIT3\r
+#define EFI_ACPI_3_0_PWR_BUTTON                             BIT4\r
+#define EFI_ACPI_3_0_SLP_BUTTON                             BIT5\r
+#define EFI_ACPI_3_0_FIX_RTC                                BIT6\r
+#define EFI_ACPI_3_0_RTC_S4                                 BIT7\r
+#define EFI_ACPI_3_0_TMR_VAL_EXT                            BIT8\r
+#define EFI_ACPI_3_0_DCK_CAP                                BIT9\r
+#define EFI_ACPI_3_0_RESET_REG_SUP                          BIT10\r
+#define EFI_ACPI_3_0_SEALED_CASE                            BIT11\r
+#define EFI_ACPI_3_0_HEADLESS                               BIT12\r
+#define EFI_ACPI_3_0_CPU_SW_SLP                             BIT13\r
+#define EFI_ACPI_3_0_PCI_EXP_WAK                            BIT14\r
+#define EFI_ACPI_3_0_USE_PLATFORM_CLOCK                     BIT15\r
+#define EFI_ACPI_3_0_S4_RTC_STS_VALID                       BIT16\r
+#define EFI_ACPI_3_0_REMOTE_POWER_ON_CAPABLE                BIT17\r
+#define EFI_ACPI_3_0_FORCE_APIC_CLUSTER_MODEL               BIT18\r
+#define EFI_ACPI_3_0_FORCE_APIC_PHYSICAL_DESTINATION_MODE   BIT19\r
 \r
 ///\r
 /// Firmware ACPI Control Structure\r
@@ -240,7 +240,7 @@ typedef struct {
 /// Firmware Control Structure Feature Flags\r
 /// All other bits are reserved and must be set to 0.\r
 ///\r
-#define EFI_ACPI_3_0_S4BIOS_F (1 << 0)\r
+#define EFI_ACPI_3_0_S4BIOS_F       BIT0\r
 \r
 //\r
 // Differentiated System Description Table,\r
@@ -271,7 +271,7 @@ typedef struct {
 /// Multiple APIC Flags\r
 /// All other bits are reserved and must be set to 0.\r
 ///\r
-#define EFI_ACPI_3_0_PCAT_COMPAT  (1 << 0)\r
+#define EFI_ACPI_3_0_PCAT_COMPAT         BIT0\r
 \r
 //\r
 // Multiple APIC Description Table APIC structure types\r
@@ -306,7 +306,7 @@ typedef struct {
 ///\r
 /// Local APIC Flags.  All other bits are reserved and must be 0.\r
 ///\r
-#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED (1 << 0)\r
+#define EFI_ACPI_3_0_LOCAL_APIC_ENABLED        BIT0\r
 \r
 ///\r
 /// IO APIC Structure\r
@@ -433,7 +433,7 @@ typedef struct {
 /// Platform Interrupt Source Flags.\r
 /// All other bits are reserved and must be set to 0.\r
 ///\r
-#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE     (1 << 0)\r
+#define EFI_ACPI_3_0_CPEI_PROCESSOR_OVERRIDE          BIT0\r
 \r
 ///\r
 /// Smart Battery Description Table (SBST)\r
@@ -474,7 +474,7 @@ typedef struct {
 ///\r
 typedef struct {\r
   EFI_ACPI_DESCRIPTION_HEADER Header;\r
-  UINT32                      Reserved1;  // Must be set to 1\r
+  UINT32                      Reserved1;  ///< Must be set to 1\r
   UINT64                      Reserved2;\r
 } EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_HEADER;\r
 \r
@@ -483,11 +483,11 @@ typedef struct {
 ///\r
 #define EFI_ACPI_3_0_SYSTEM_RESOURCE_AFFINITY_TABLE_REVISION  0x02\r
 \r
-///\r
-/// SRAT structure types.\r
-/// All other values between 0x02 an 0xFF are reserved and\r
-/// will be ignored by OSPM.\r
-///\r
+//\r
+// SRAT structure types.\r
+// All other values between 0x02 an 0xFF are reserved and\r
+// will be ignored by OSPM.\r
+//\r
 #define EFI_ACPI_3_0_PROCESSOR_LOCAL_APIC_SAPIC_AFFINITY  0x00\r
 #define EFI_ACPI_3_0_MEMORY_AFFINITY                      0x01\r
 \r