UINT8 SKSV : 1;\r
UINT8 sense_key_specific_16;\r
UINT8 sense_key_specific_17;\r
- ///\r
- /// Followed by additional sense bytes.\r
- /// the sizeof (ATAPI_REQUEST_SENSE_DATA) is 254, \r
- /// since allocation_length is one byte in ATAPI_INQUIRY_CMD.\r
- ///\r
- UINT8 additional_sense_bytes_18_253[253 - 18 + 1];\r
} ATAPI_REQUEST_SENSE_DATA;\r
\r
///\r
-/// The followings are defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
-///\r
-\r
-///\r
-/// READ CAPACITY Data \r
+/// READ CAPACITY Data, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
UINT8 LastLba3;\r
\r
///\r
/// Capacity List Header + Current/Maximum Capacity Descriptor,\r
+/// defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
UINT8 reserved_0;\r
} ATAPI_READ_FORMAT_CAPACITY_DATA;\r
\r
///\r
-/// Test Unit Ready Command\r
+/// Test Unit Ready Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
UINT8 opcode;\r
} ATAPI_TEST_UNIT_READY_CMD;\r
\r
///\r
-/// INQUIRY Command\r
+/// INQUIRY Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
UINT8 opcode;\r
} ATAPI_INQUIRY_CMD;\r
\r
///\r
-/// REQUEST SENSE Command\r
+/// REQUEST SENSE Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
UINT8 opcode;\r
} ATAPI_REQUEST_SENSE_CMD;\r
\r
///\r
-/// READ (10) Command\r
+/// READ (10) Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
UINT8 opcode;\r
} ATAPI_READ10_CMD;\r
\r
///\r
-/// READ Format Capacity Command\r
+/// READ Format Capacity Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
UINT8 opcode;\r
} ATAPI_READ_FORMAT_CAP_CMD;\r
\r
///\r
-/// MODE SENSE Command\r
+/// MODE SENSE Command, defined in SFF-8070i(ATAPI Removable Rewritable Specification)\r
///\r
typedef struct {\r
UINT8 opcode;\r
#define ATA_CMD_READ_LONG_WITH_RETRY 0x23 ///< defined in ATA-5\r
#define ATA_CMD_READ_SECTORS_EXT 0x24 ///< defined in ATA-6\r
\r
-\r
//\r
// Class 2: PIO Data-Out Commands\r
//\r
#define ATA_CMD_STANDBY_ALIAS 0xe2 ///< defined in ATA-6\r
#define ATA_CMD_STANDBY_IMMEDIATE 0x94 ///< defined in ATA-3\r
#define ATA_CMD_STANDBY_IMMEDIATE_ALIAS 0xe0 ///< defined in ATA-6\r
-///\r
-/// S.M.A.R.T\r
-///\r
+//\r
+// S.M.A.R.T\r
+//\r
#define ATA_CMD_SMART 0xb0\r
#define ATA_CONSTANT_C2 0xc2\r
#define ATA_CONSTANT_4F 0x4f\r
#define ATA_SMART_ENABLE_OPERATION 0xd8\r
#define ATA_SMART_RETURN_STATUS 0xda\r
\r
-\r
-///\r
-/// Class 4: DMA Command\r
-///\r
+//\r
+// Class 4: DMA Command\r
+//\r
#define ATA_CMD_READ_DMA 0xc8 ///< defined in ATA-6\r
#define ATA_CMD_READ_DMA_WITH_RETRY 0xc9 ///< defined in ATA-4\r
#define ATA_CMD_READ_DMA_EXT 0x25 ///< defined in ATA-6\r
#define ATA_CMD_WRITE_DMA 0xca ///< defined in ATA-6\r
#define ATA_CMD_WRITE_DMA_WITH_RETRY 0xcb ///< defined in ATA-4\r
#define ATA_CMD_WRITE_DMA_EXT 0x35 ///< defined in ATA-6\r
-\r
-\r
-\r
+ \r
///\r
/// default content of device control register, disable INT,\r
/// Bit3 is set to 1 according ATA-1\r
\r
#define ATA_REQUEST_SENSE_ERROR (0x70) ///< defined in SFF-8070i\r
\r
-///\r
-/// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier\r
-/// defined in MultiMedia Commands (MMC, MMC-2) \r
-///\r
-/// Sense Key \r
-///\r
+//\r
+// Sense Key, Additional Sense Codes and Additional Sense Code Qualifier\r
+// defined in MultiMedia Commands (MMC, MMC-2) \r
+//\r
+// Sense Key \r
+//\r
#define ATA_SK_NO_SENSE (0x0)\r
#define ATA_SK_RECOVERY_ERROR (0x1)\r
#define ATA_SK_NOT_READY (0x2)\r
#define ATA_SK_MISCOMPARE (0xE)\r
#define ATA_SK_RESERVED_F (0xF)\r
\r
-///\r
-/// Additional Sense Codes\r
-///\r
+//\r
+// Additional Sense Codes\r
+//\r
#define ATA_ASC_NOT_READY (0x04)\r
#define ATA_ASC_MEDIA_ERR1 (0x10)\r
#define ATA_ASC_MEDIA_ERR2 (0x11)\r
//\r
#define ATA_ASCQ_IN_PROGRESS (0x01)\r
\r
-///\r
-/// Error Register\r
-///\r
+//\r
+// Error Register\r
+//\r
#define ATA_ERRREG_BBK BIT7 ///< Bad block detected defined in ATA-1\r
#define ATA_ERRREG_UNC BIT6 ///< Uncorrectable Data defined in ATA-3\r
#define ATA_ERRREG_MC BIT5 ///< Media Change defined in ATA-3\r
#define ATA_ERRREG_TK0NF BIT1 ///< Track 0 Not Found defined in ATA-3\r
#define ATA_ERRREG_AMNF BIT0 ///< Address Mark Not Found defined in ATA-3\r
\r
-///\r
-/// Status Register\r
-///\r
+//\r
+// Status Register\r
+//\r
#define ATA_STSREG_BSY BIT7 ///< Controller Busy defined in ATA-6\r
#define ATA_STSREG_DRDY BIT6 ///< Drive Ready defined in ATA-6\r
#define ATA_STSREG_DWF BIT5 ///< Drive Write Fault defined in ATA-6\r
#define ATA_STSREG_IDX BIT1 ///< Index defined in ATA-3\r
#define ATA_STSREG_ERR BIT0 ///< Error defined in ATA-6\r
\r
-///\r
-/// Device Control Register\r
-///\r
+//\r
+// Device Control Register\r
+//\r
#define ATA_CTLREG_SRST BIT2 ///< Software Reset\r
#define ATA_CTLREG_IEN_L BIT1 ///< Interrupt Enable #\r
\r