--- /dev/null
+/** @file\r
+ ACPI IO Remapping Table (IORT) as specified in ARM spec DEN0049B\r
+\r
+ http://infocenter.arm.com/help/topic/com.arm.doc.den0049b/DEN0049B_IO_Remapping_Table.pdf\r
+\r
+ Copyright (c) 2017, Linaro Limited. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+**/\r
+\r
+#ifndef __IO_REMAPPING_TABLE_H__\r
+#define __IO_REMAPPING_TABLE_H__\r
+\r
+#include <IndustryStandard/Acpi.h>\r
+\r
+#define EFI_ACPI_IO_REMAPPING_TABLE_REVISION 0x0\r
+\r
+#define EFI_ACPI_IORT_TYPE_ITS_GROUP 0x0\r
+#define EFI_ACPI_IORT_TYPE_NAMED_COMP 0x1\r
+#define EFI_ACPI_IORT_TYPE_ROOT_COMPLEX 0x2\r
+#define EFI_ACPI_IORT_TYPE_SMMUv1v2 0x3\r
+#define EFI_ACPI_IORT_TYPE_SMMUv3 0x4\r
+\r
+#define EFI_ACPI_IORT_MEM_ACCESS_PROP_CCA BIT0\r
+\r
+#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_TR BIT0\r
+#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_WA BIT1\r
+#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_RA BIT2\r
+#define EFI_ACPI_IORT_MEM_ACCESS_PROP_AH_AHO BIT3\r
+\r
+#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_CPM BIT0\r
+#define EFI_ACPI_IORT_MEM_ACCESS_FLAGS_DACS BIT1\r
+\r
+#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v1 0x0\r
+#define EFI_ACPI_IORT_SMMUv1v2_MODEL_v2 0x1\r
+#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU400 0x2\r
+#define EFI_ACPI_IORT_SMMUv1v2_MODEL_MMU500 0x3\r
+\r
+#define EFI_ACPI_IORT_SMMUv1v2_FLAG_DVM BIT0\r
+#define EFI_ACPI_IORT_SMMUv1v2_FLAG_COH_WALK BIT1\r
+\r
+#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_LEVEL 0x0\r
+#define EFI_ACPI_IORT_SMMUv1v2_INT_FLAG_EDGE 0x1\r
+\r
+#define EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE BIT0\r
+#define EFI_ACPI_IORT_SMMUv3_FLAG_HTTU_OVERRIDE BIT1\r
+\r
+#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED 0x0\r
+#define EFI_ACPI_IORT_ROOT_COMPLEX_ATS_SUPPORTED 0x1\r
+\r
+#define EFI_ACPI_IORT_ID_MAPPING_FLAGS_SINGLE BIT0\r
+\r
+#pragma pack(1)\r
+\r
+///\r
+/// Table header\r
+///\r
+typedef struct {\r
+ EFI_ACPI_DESCRIPTION_HEADER Header;\r
+ UINT32 NumNodes;\r
+ UINT32 NodeOffset;\r
+ UINT32 Reserved;\r
+} EFI_ACPI_6_0_IO_REMAPPING_TABLE;\r
+\r
+///\r
+/// Definition for ID mapping table shared by all node types\r
+///\r
+typedef struct {\r
+ UINT32 InputBase;\r
+ UINT32 NumIds;\r
+ UINT32 OutputBase;\r
+ UINT32 OutputReference;\r
+ UINT32 Flags;\r
+} EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE;\r
+\r
+///\r
+/// Node header definition shared by all node types\r
+///\r
+typedef struct {\r
+ UINT8 Type;\r
+ UINT16 Length;\r
+ UINT8 Revision;\r
+ UINT32 Reserved;\r
+ UINT32 NumIdMappings;\r
+ UINT32 IdReference;\r
+} EFI_ACPI_6_0_IO_REMAPPING_NODE;\r
+\r
+///\r
+/// Node type 0: ITS node\r
+///\r
+typedef struct {\r
+ EFI_ACPI_6_0_IO_REMAPPING_NODE Node;\r
+\r
+ UINT32 NumItsIdentifiers;\r
+//UINT32 ItsIdentifiers[NumItsIdentifiers];\r
+} EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE;\r
+\r
+///\r
+/// Node type 1: root complex node\r
+///\r
+typedef struct {\r
+ EFI_ACPI_6_0_IO_REMAPPING_NODE Node;\r
+\r
+ UINT32 CacheCoherent;\r
+ UINT8 AllocationHints;\r
+ UINT16 Reserved;\r
+ UINT8 MemoryAccessFlags;\r
+\r
+ UINT32 AtsAttribute;\r
+ UINT32 PciSegmentNumber;\r
+} EFI_ACPI_6_0_IO_REMAPPING_RC_NODE;\r
+\r
+///\r
+/// Node type 2: named component node\r
+///\r
+typedef struct {\r
+ EFI_ACPI_6_0_IO_REMAPPING_NODE Node;\r
+\r
+ UINT32 Flags;\r
+ UINT32 CacheCoherent;\r
+ UINT8 AllocationHints;\r
+ UINT16 Reserved;\r
+ UINT8 MemoryAccessFlags;\r
+ UINT8 AddressSizeLimit;\r
+//UINT8 ObjectName[];\r
+} EFI_ACPI_6_0_IO_REMAPPING_NAMED_COMP_NODE;\r
+\r
+///\r
+/// Node type 3: SMMUv1 or SMMUv2 node\r
+///\r
+typedef struct {\r
+ UINT32 Interrupt;\r
+ UINT32 InterruptFlags;\r
+} EFI_ACPI_6_0_IO_REMAPPING_SMMU_INT;\r
+\r
+typedef struct {\r
+ EFI_ACPI_6_0_IO_REMAPPING_NODE Node;\r
+\r
+ UINT64 Base;\r
+ UINT64 Span;\r
+ UINT32 Model;\r
+ UINT32 Flags;\r
+ UINT32 GlobalInterruptArrayRef;\r
+ UINT32 NumContextInterrupts;\r
+ UINT32 ContextInterruptArrayRef;\r
+ UINT32 NumPmuInterrupts;\r
+ UINT32 PmuInterruptArrayRef;\r
+\r
+ UINT32 SMMU_NSgIrpt;\r
+ UINT32 SMMU_NSgIrptFlags;\r
+ UINT32 SMMU_NSgCfgIrpt;\r
+ UINT32 SMMU_NSgCfgIrptFlags;\r
+\r
+//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT ContextInterrupt[NumContextInterrupts];\r
+//EFI_ACPI_6_0_IO_REMAPPING_SMMU_CTX_INT PmuInterrupt[NumPmuInterrupts];\r
+} EFI_ACPI_6_0_IO_REMAPPING_SMMU_NODE;\r
+\r
+///\r
+/// Node type 4: SMMUv4 node\r
+///\r
+typedef struct {\r
+ EFI_ACPI_6_0_IO_REMAPPING_NODE Node;\r
+\r
+ UINT64 Base;\r
+ UINT32 Flags;\r
+ UINT32 Reserved;\r
+ UINT64 VatosAddress;\r
+ UINT32 Model;\r
+ UINT32 Event;\r
+ UINT32 Pri;\r
+ UINT32 Gerr;\r
+ UINT32 Sync;\r
+} EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE;\r
+\r
+#pragma pack()\r
+\r
+#endif\r