///\r
/// SAL System Table Definitions\r
///\r
+#pragma pack(1)\r
typedef struct {\r
///\r
/// The ASCII string representation of "SST_" which confirms the presence of the table. \r
///\r
UINT8 Reserved2[8];\r
} SAL_SYSTEM_TABLE_HEADER;\r
+#pragma pack()\r
\r
#define EFI_SAL_ST_HEADER_SIGNATURE "SST_"\r
#define EFI_SAL_REVISION 0x0320\r
#define EFI_SAL_ST_PTC_SIZE 16\r
#define EFI_SAL_ST_AP_WAKEUP_SIZE 16\r
\r
+#pragma pack(1)\r
///\r
/// Format Entrypoint Descriptor Entry\r
///\r
UINT64 Reserved2[2];\r
} SAL_ST_ENTRY_POINT_DESCRIPTOR;\r
\r
+#pragma pack(1)\r
///\r
/// Format Platform Features Descriptor Entry\r
///\r
UINT8 PlatformFeatures;\r
UINT8 Reserved[14];\r
} SAL_ST_PLATFORM_FEATURES;\r
-\r
+#pragma pack()\r
//\r
// Value of Platform Feature List\r
//\r
#define SAL_PLAT_FEAT_PLAT_IPI_HINT 0x02\r
#define SAL_PLAT_FEAT_PROC_IPI_HINT 0x04\r
\r
+#pragma pack(1)\r
///\r
/// Format of Translation Register Descriptor Entry\r
///\r
UINT64 EncodedPageSize;\r
UINT64 Reserved1;\r
} SAL_ST_TR_DECRIPTOR;\r
-\r
+#pragma pack()\r
//\r
// Type of Translation Register\r
//\r
#define EFI_SAL_ST_TR_USAGE_INSTRUCTION 00\r
#define EFI_SAL_ST_TR_USAGE_DATA 01\r
\r
+#pragma pack(1)\r
///\r
/// Definition of Coherence Domain Information\r
///\r
UINT64 NumberOfProcessors;\r
UINT64 LocalIDRegister;\r
} SAL_COHERENCE_DOMAIN_INFO;\r
+#pragma pack()\r
\r
+#pragma pack(1)\r
///\r
/// Format of Purge Translation Cache Coherence Domain Entry\r
///\r
UINT32 NumberOfDomains;\r
SAL_COHERENCE_DOMAIN_INFO *DomainInformation;\r
} SAL_ST_CACHE_COHERENCE_DECRIPTOR;\r
+#pragma pack()\r
\r
+#pragma pack(1)\r
///\r
/// Format of Application Processor Wake-Up Descriptor Entry\r
///\r
UINT8 Reserved[6];\r
UINT64 ExternalInterruptVector;\r
} SAL_ST_AP_WAKEUP_DECRIPTOR;\r
+#pragma pack()\r
\r
///\r
/// Format of Firmware Interface Table (FIT) Entry\r
#define PROC_CR_LID_VALID_BIT_MASK 0x4\r
#define PROC_STATIC_STRUCT_VALID_BIT_MASK 0x8\r
#define CPU_INFO_VALID_BIT_MASK 0x1000000\r
-\r
-#pragma pack(1)\r
-\r
///\r
/// Definition of Processor Machine Check Error Record\r
///\r
PSI_STATIC_STRUCT PsiValidData;\r
} SAL_PROCESSOR_ERROR_RECORD;\r
\r
-#pragma pack()\r
-\r
///\r
/// GUID of Platform Memory Device Error Info\r
///\r
UINT8 SegmentNumber;\r
UINT8 Reserved[5];\r
} PCI_COMP_INFO;\r
-\r
///\r
/// Definition of Platform PCI Component Error Info\r
///\r
#define SEL_EVENT_DATA1_VALID_BIT_MASK 0x80;\r
#define SEL_EVENT_DATA2_VALID_BIT_MASK 0x100;\r
#define SEL_EVENT_DATA3_VALID_BIT_MASK 0x200;\r
-\r
-#pragma pack(1)\r
///\r
/// Definition of Platform SEL Device Error Info Record\r
///\r
UINT8 Data2;\r
UINT8 Data3;\r
} SAL_SEL_DEVICE_ERROR_RECORD;\r
-#pragma pack()\r
\r
///\r
/// GUID of Platform SMBIOS Device Error Info\r
UINT8 *Raw;\r
} SAL_ERROR_RECORDS_POINTERS;\r
\r
+#pragma pack()\r
+\r
#endif\r