Specification Version 4.10 spec.\r
\r
Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>\r
- This program and the accompanying materials\r
- are licensed and made available under the terms and conditions of the BSD License\r
- which accompanies this distribution. The full text of the license may be found at\r
- http://opensource.org/licenses/bsd-license.php\r
-\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+ SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
//\r
// SD command index\r
//\r
-#define SD_GO_IDLE_STATE 0\r
-#define SD_ALL_SEND_CID 2\r
-#define SD_SET_RELATIVE_ADDR 3\r
-#define SD_SET_DSR 4\r
-#define SDIO_SEND_OP_COND 5\r
-#define SD_SWITCH_FUNC 6\r
-#define SD_SELECT_DESELECT_CARD 7\r
-#define SD_SEND_IF_COND 8\r
-#define SD_SEND_CSD 9\r
-#define SD_SEND_CID 10\r
-#define SD_VOLTAGE_SWITCH 11\r
-#define SD_STOP_TRANSMISSION 12\r
-#define SD_SEND_STATUS 13\r
-#define SD_GO_INACTIVE_STATE 15\r
-#define SD_SET_BLOCKLEN 16\r
-#define SD_READ_SINGLE_BLOCK 17\r
-#define SD_READ_MULTIPLE_BLOCK 18\r
-#define SD_SEND_TUNING_BLOCK 19\r
-#define SD_SPEED_CLASS_CONTROL 20\r
-#define SD_SET_BLOCK_COUNT 23\r
-#define SD_WRITE_SINGLE_BLOCK 24\r
-#define SD_WRITE_MULTIPLE_BLOCK 25\r
-#define SD_PROGRAM_CSD 27\r
-#define SD_SET_WRITE_PROT 28\r
-#define SD_CLR_WRITE_PROT 29\r
-#define SD_SEND_WRITE_PROT 30\r
-#define SD_ERASE_WR_BLK_START 32\r
-#define SD_ERASE_WR_BLK_END 33\r
-#define SD_ERASE 38\r
-#define SD_LOCK_UNLOCK 42\r
-#define SD_READ_EXTR_SINGLE 48\r
-#define SD_WRITE_EXTR_SINGLE 49\r
-#define SDIO_RW_DIRECT 52\r
-#define SDIO_RW_EXTENDED 53\r
-#define SD_APP_CMD 55\r
-#define SD_GEN_CMD 56\r
-#define SD_READ_EXTR_MULTI 58\r
-#define SD_WRITE_EXTR_MULTI 59\r
+#define SD_GO_IDLE_STATE 0\r
+#define SD_ALL_SEND_CID 2\r
+#define SD_SET_RELATIVE_ADDR 3\r
+#define SD_SET_DSR 4\r
+#define SDIO_SEND_OP_COND 5\r
+#define SD_SWITCH_FUNC 6\r
+#define SD_SELECT_DESELECT_CARD 7\r
+#define SD_SEND_IF_COND 8\r
+#define SD_SEND_CSD 9\r
+#define SD_SEND_CID 10\r
+#define SD_VOLTAGE_SWITCH 11\r
+#define SD_STOP_TRANSMISSION 12\r
+#define SD_SEND_STATUS 13\r
+#define SD_GO_INACTIVE_STATE 15\r
+#define SD_SET_BLOCKLEN 16\r
+#define SD_READ_SINGLE_BLOCK 17\r
+#define SD_READ_MULTIPLE_BLOCK 18\r
+#define SD_SEND_TUNING_BLOCK 19\r
+#define SD_SPEED_CLASS_CONTROL 20\r
+#define SD_SET_BLOCK_COUNT 23\r
+#define SD_WRITE_SINGLE_BLOCK 24\r
+#define SD_WRITE_MULTIPLE_BLOCK 25\r
+#define SD_PROGRAM_CSD 27\r
+#define SD_SET_WRITE_PROT 28\r
+#define SD_CLR_WRITE_PROT 29\r
+#define SD_SEND_WRITE_PROT 30\r
+#define SD_ERASE_WR_BLK_START 32\r
+#define SD_ERASE_WR_BLK_END 33\r
+#define SD_ERASE 38\r
+#define SD_LOCK_UNLOCK 42\r
+#define SD_READ_EXTR_SINGLE 48\r
+#define SD_WRITE_EXTR_SINGLE 49\r
+#define SDIO_RW_DIRECT 52\r
+#define SDIO_RW_EXTENDED 53\r
+#define SD_APP_CMD 55\r
+#define SD_GEN_CMD 56\r
+#define SD_READ_EXTR_MULTI 58\r
+#define SD_WRITE_EXTR_MULTI 59\r
\r
#define SD_SET_BUS_WIDTH 6 // ACMD6\r
#define SD_STATUS 13 // ACMD13\r
\r
#pragma pack(1)\r
typedef struct {\r
- UINT8 NotUsed:1; // Not used [0:0]\r
- UINT8 Crc:7; // CRC [7:1]\r
- UINT16 ManufacturingDate:12; // Manufacturing date [19:8]\r
- UINT16 Reserved:4; // Reserved [23:20]\r
- UINT8 ProductSerialNumber[4]; // Product serial number [55:24]\r
- UINT8 ProductRevision; // Product revision [63:56]\r
- UINT8 ProductName[5]; // Product name [103:64]\r
- UINT8 OemId[2]; // OEM/Application ID [119:104]\r
- UINT8 ManufacturerId; // Manufacturer ID [127:120]\r
+ UINT8 NotUsed : 1; // Not used [0:0]\r
+ UINT8 Crc : 7; // CRC [7:1]\r
+ UINT16 ManufacturingDate : 12; // Manufacturing date [19:8]\r
+ UINT16 Reserved : 4; // Reserved [23:20]\r
+ UINT8 ProductSerialNumber[4]; // Product serial number [55:24]\r
+ UINT8 ProductRevision; // Product revision [63:56]\r
+ UINT8 ProductName[5]; // Product name [103:64]\r
+ UINT8 OemId[2]; // OEM/Application ID [119:104]\r
+ UINT8 ManufacturerId; // Manufacturer ID [127:120]\r
} SD_CID;\r
\r
typedef struct {\r
- UINT32 NotUsed:1; // Not used [0:0]\r
- UINT32 Crc:7; // CRC [7:1]\r
- UINT32 Reserved:2; // Reserved [9:8]\r
- UINT32 FileFormat:2; // File format [11:10]\r
- UINT32 TmpWriteProtect:1; // Temporary write protection [12:12]\r
- UINT32 PermWriteProtect:1; // Permanent write protection [13:13]\r
- UINT32 Copy:1; // Copy flag (OTP) [14:14]\r
- UINT32 FileFormatGrp:1; // File format group [15:15]\r
- UINT32 Reserved1:5; // Reserved [20:16]\r
- UINT32 WriteBlPartial:1; // Partial blocks for write allowed [21:21]\r
- UINT32 WriteBlLen:4; // Max. write data block length [25:22]\r
- UINT32 R2WFactor:3; // Write speed factor [28:26]\r
- UINT32 Reserved2:2; // Manufacturer default ECC [30:29]\r
- UINT32 WpGrpEnable:1; // Write protect group enable [31:31]\r
-\r
- UINT32 WpGrpSize:7; // Write protect group size [38:32]\r
- UINT32 SectorSize:7; // Erase sector size [45:39]\r
- UINT32 EraseBlkEn:1; // Erase single block enable [46:46]\r
- UINT32 CSizeMul:3; // device size multiplier [49:47]\r
- UINT32 VddWCurrMax:3; // max. write current @VDD max [52:50]\r
- UINT32 VddWCurrMin:3; // max. write current @VDD min [55:53]\r
- UINT32 VddRCurrMax:3; // max. read current @VDD max [58:56]\r
- UINT32 VddRCurrMin:3; // max. read current @VDD min [61:59]\r
- UINT32 CSizeLow:2; // Device size low 2 bits [63:62]\r
-\r
- UINT32 CSizeHigh:10; // Device size high 10 bits [73:64]\r
- UINT32 Reserved4:2; // Reserved [75:74]\r
- UINT32 DsrImp:1; // DSR implemented [76:76]\r
- UINT32 ReadBlkMisalign:1; // Read block misalignment [77:77]\r
- UINT32 WriteBlkMisalign:1; // Write block misalignment [78:78]\r
- UINT32 ReadBlPartial:1; // Partial blocks for read allowed [79:79]\r
- UINT32 ReadBlLen:4; // Max. read data block length [83:80]\r
- UINT32 Ccc:12; // Card command classes [95:84]\r
-\r
- UINT32 TranSpeed:8; // Max. data transfer rate [103:96]\r
- UINT32 Nsac:8; // Data read access-time in CLK cycles (NSAC*100) [111:104]\r
- UINT32 Taac:8; // Data read access-time [119:112]\r
- UINT32 Reserved5:6; // Reserved [125:120]\r
- UINT32 CsdStructure:2; // CSD structure [127:126]\r
+ UINT32 NotUsed : 1; // Not used [0:0]\r
+ UINT32 Crc : 7; // CRC [7:1]\r
+ UINT32 Reserved : 2; // Reserved [9:8]\r
+ UINT32 FileFormat : 2; // File format [11:10]\r
+ UINT32 TmpWriteProtect : 1; // Temporary write protection [12:12]\r
+ UINT32 PermWriteProtect : 1; // Permanent write protection [13:13]\r
+ UINT32 Copy : 1; // Copy flag (OTP) [14:14]\r
+ UINT32 FileFormatGrp : 1; // File format group [15:15]\r
+ UINT32 Reserved1 : 5; // Reserved [20:16]\r
+ UINT32 WriteBlPartial : 1; // Partial blocks for write allowed [21:21]\r
+ UINT32 WriteBlLen : 4; // Max. write data block length [25:22]\r
+ UINT32 R2WFactor : 3; // Write speed factor [28:26]\r
+ UINT32 Reserved2 : 2; // Manufacturer default ECC [30:29]\r
+ UINT32 WpGrpEnable : 1; // Write protect group enable [31:31]\r
+\r
+ UINT32 WpGrpSize : 7; // Write protect group size [38:32]\r
+ UINT32 SectorSize : 7; // Erase sector size [45:39]\r
+ UINT32 EraseBlkEn : 1; // Erase single block enable [46:46]\r
+ UINT32 CSizeMul : 3; // device size multiplier [49:47]\r
+ UINT32 VddWCurrMax : 3; // max. write current @VDD max [52:50]\r
+ UINT32 VddWCurrMin : 3; // max. write current @VDD min [55:53]\r
+ UINT32 VddRCurrMax : 3; // max. read current @VDD max [58:56]\r
+ UINT32 VddRCurrMin : 3; // max. read current @VDD min [61:59]\r
+ UINT32 CSizeLow : 2; // Device size low 2 bits [63:62]\r
+\r
+ UINT32 CSizeHigh : 10; // Device size high 10 bits [73:64]\r
+ UINT32 Reserved4 : 2; // Reserved [75:74]\r
+ UINT32 DsrImp : 1; // DSR implemented [76:76]\r
+ UINT32 ReadBlkMisalign : 1; // Read block misalignment [77:77]\r
+ UINT32 WriteBlkMisalign : 1; // Write block misalignment [78:78]\r
+ UINT32 ReadBlPartial : 1; // Partial blocks for read allowed [79:79]\r
+ UINT32 ReadBlLen : 4; // Max. read data block length [83:80]\r
+ UINT32 Ccc : 12; // Card command classes [95:84]\r
+\r
+ UINT32 TranSpeed : 8; // Max. data transfer rate [103:96]\r
+ UINT32 Nsac : 8; // Data read access-time in CLK cycles (NSAC*100) [111:104]\r
+ UINT32 Taac : 8; // Data read access-time [119:112]\r
+ UINT32 Reserved5 : 6; // Reserved [125:120]\r
+ UINT32 CsdStructure : 2; // CSD structure [127:126]\r
} SD_CSD;\r
\r
typedef struct {\r
- UINT32 NotUsed:1; // Not used [0:0]\r
- UINT32 Crc:7; // CRC [7:1]\r
- UINT32 Reserved:2; // Reserved [9:8]\r
- UINT32 FileFormat:2; // File format [11:10]\r
- UINT32 TmpWriteProtect:1; // Temporary write protection [12:12]\r
- UINT32 PermWriteProtect:1; // Permanent write protection [13:13]\r
- UINT32 Copy:1; // Copy flag (OTP) [14:14]\r
- UINT32 FileFormatGrp:1; // File format group [15:15]\r
- UINT32 Reserved1:5; // Reserved [20:16]\r
- UINT32 WriteBlPartial:1; // Partial blocks for write allowed [21:21]\r
- UINT32 WriteBlLen:4; // Max. write data block length [25:22]\r
- UINT32 R2WFactor:3; // Write speed factor [28:26]\r
- UINT32 Reserved2:2; // Manufacturer default ECC [30:29]\r
- UINT32 WpGrpEnable:1; // Write protect group enable [31:31]\r
-\r
- UINT32 WpGrpSize:7; // Write protect group size [38:32]\r
- UINT32 SectorSize:7; // Erase sector size [45:39]\r
- UINT32 EraseBlkEn:1; // Erase single block enable [46:46]\r
- UINT32 Reserved3:1; // Reserved [47:47]\r
- UINT32 CSizeLow:16; // Device size low 16 bits [63:48]\r
-\r
- UINT32 CSizeHigh:6; // Device size high 6 bits [69:64]\r
- UINT32 Reserved4:6; // Reserved [75:70]\r
- UINT32 DsrImp:1; // DSR implemented [76:76]\r
- UINT32 ReadBlkMisalign:1; // Read block misalignment [77:77]\r
- UINT32 WriteBlkMisalign:1; // Write block misalignment [78:78]\r
- UINT32 ReadBlPartial:1; // Partial blocks for read allowed [79:79]\r
- UINT32 ReadBlLen:4; // Max. read data block length [83:80]\r
- UINT32 Ccc:12; // Card command classes [95:84]\r
-\r
- UINT32 TranSpeed:8; // Max. data transfer rate [103:96]\r
- UINT32 Nsac:8; // Data read access-time in CLK cycles (NSAC*100) [111:104]\r
- UINT32 Taac:8; // Data read access-time [119:112]\r
- UINT32 Reserved5:6; // Reserved [125:120]\r
- UINT32 CsdStructure:2; // CSD structure [127:126]\r
+ UINT32 NotUsed : 1; // Not used [0:0]\r
+ UINT32 Crc : 7; // CRC [7:1]\r
+ UINT32 Reserved : 2; // Reserved [9:8]\r
+ UINT32 FileFormat : 2; // File format [11:10]\r
+ UINT32 TmpWriteProtect : 1; // Temporary write protection [12:12]\r
+ UINT32 PermWriteProtect : 1; // Permanent write protection [13:13]\r
+ UINT32 Copy : 1; // Copy flag (OTP) [14:14]\r
+ UINT32 FileFormatGrp : 1; // File format group [15:15]\r
+ UINT32 Reserved1 : 5; // Reserved [20:16]\r
+ UINT32 WriteBlPartial : 1; // Partial blocks for write allowed [21:21]\r
+ UINT32 WriteBlLen : 4; // Max. write data block length [25:22]\r
+ UINT32 R2WFactor : 3; // Write speed factor [28:26]\r
+ UINT32 Reserved2 : 2; // Manufacturer default ECC [30:29]\r
+ UINT32 WpGrpEnable : 1; // Write protect group enable [31:31]\r
+\r
+ UINT32 WpGrpSize : 7; // Write protect group size [38:32]\r
+ UINT32 SectorSize : 7; // Erase sector size [45:39]\r
+ UINT32 EraseBlkEn : 1; // Erase single block enable [46:46]\r
+ UINT32 Reserved3 : 1; // Reserved [47:47]\r
+ UINT32 CSizeLow : 16; // Device size low 16 bits [63:48]\r
+\r
+ UINT32 CSizeHigh : 6; // Device size high 6 bits [69:64]\r
+ UINT32 Reserved4 : 6; // Reserved [75:70]\r
+ UINT32 DsrImp : 1; // DSR implemented [76:76]\r
+ UINT32 ReadBlkMisalign : 1; // Read block misalignment [77:77]\r
+ UINT32 WriteBlkMisalign : 1; // Write block misalignment [78:78]\r
+ UINT32 ReadBlPartial : 1; // Partial blocks for read allowed [79:79]\r
+ UINT32 ReadBlLen : 4; // Max. read data block length [83:80]\r
+ UINT32 Ccc : 12; // Card command classes [95:84]\r
+\r
+ UINT32 TranSpeed : 8; // Max. data transfer rate [103:96]\r
+ UINT32 Nsac : 8; // Data read access-time in CLK cycles (NSAC*100) [111:104]\r
+ UINT32 Taac : 8; // Data read access-time [119:112]\r
+ UINT32 Reserved5 : 6; // Reserved [125:120]\r
+ UINT32 CsdStructure : 2; // CSD structure [127:126]\r
} SD_CSD2;\r
\r
typedef struct {\r
- UINT32 Reserved; // Reserved [31:0]\r
-\r
- UINT32 CmdSupport:4; // Command Support bits [35:32]\r
- UINT32 Reserved1:6; // Reserved [41:36]\r
- UINT32 SdSpec4:1; // Spec. Version 4.00 or higher [42:42]\r
- UINT32 ExSecurity:4; // Extended Security Support [46:43]\r
- UINT32 SdSpec3:1; // Spec. Version 3.00 or higher [47:47]\r
- UINT32 SdBusWidths:4; // DAT Bus widths supported [51:48]\r
- UINT32 SdSecurity:3; // CPRM security support [54:52]\r
- UINT32 DataStatAfterErase:1; // Data status after erases [55]\r
- UINT32 SdSpec:4; // SD Memory Card Spec. Version [59:56]\r
- UINT32 ScrStructure:4; // SCR Structure [63:60]\r
+ UINT32 Reserved; // Reserved [31:0]\r
+\r
+ UINT32 CmdSupport : 4; // Command Support bits [35:32]\r
+ UINT32 Reserved1 : 6; // Reserved [41:36]\r
+ UINT32 SdSpec4 : 1; // Spec. Version 4.00 or higher [42:42]\r
+ UINT32 ExSecurity : 4; // Extended Security Support [46:43]\r
+ UINT32 SdSpec3 : 1; // Spec. Version 3.00 or higher [47:47]\r
+ UINT32 SdBusWidths : 4; // DAT Bus widths supported [51:48]\r
+ UINT32 SdSecurity : 3; // CPRM security support [54:52]\r
+ UINT32 DataStatAfterErase : 1; // Data status after erases [55]\r
+ UINT32 SdSpec : 4; // SD Memory Card Spec. Version [59:56]\r
+ UINT32 ScrStructure : 4; // SCR Structure [63:60]\r
} SD_SCR;\r
\r
#pragma pack()\r