/** @file\r
- Industry Standard Definitions of SMBIOS Table Specification v3.0.0.\r
+ Industry Standard Definitions of SMBIOS Table Specification v3.3.0.\r
\r
-Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r
-This program and the accompanying materials are licensed and made available under \r
-the terms and conditions of the BSD License that accompanies this distribution. \r
-The full text of the license may be found at\r
-http://opensource.org/licenses/bsd-license.php. \r
- \r
-THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
-WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r
+(C) Copyright 2015-2017 Hewlett Packard Enterprise Development LP<BR>\r
+(C) Copyright 2015 - 2019 Hewlett Packard Enterprise Development LP<BR>\r
+SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
///\r
#define SMBIOS_STRING_MAX_LENGTH 64\r
\r
+//\r
+// The length of the entire structure table (including all strings) must be reported\r
+// in the Structure Table Length field of the SMBIOS Structure Table Entry Point,\r
+// which is a WORD field limited to 65,535 bytes.\r
+//\r
+#define SMBIOS_TABLE_MAX_LENGTH 0xFFFF\r
+\r
+//\r
+// For SMBIOS 3.0, Structure table maximum size in Entry Point structure is DWORD field limited to 0xFFFFFFFF bytes.\r
+//\r
+#define SMBIOS_3_0_TABLE_MAX_LENGTH 0xFFFFFFFF\r
+\r
+//\r
+// SMBIOS type macros which is according to SMBIOS 3.3.0 specification.\r
+//\r
+#define SMBIOS_TYPE_BIOS_INFORMATION 0\r
+#define SMBIOS_TYPE_SYSTEM_INFORMATION 1\r
+#define SMBIOS_TYPE_BASEBOARD_INFORMATION 2\r
+#define SMBIOS_TYPE_SYSTEM_ENCLOSURE 3\r
+#define SMBIOS_TYPE_PROCESSOR_INFORMATION 4\r
+#define SMBIOS_TYPE_MEMORY_CONTROLLER_INFORMATION 5\r
+#define SMBIOS_TYPE_MEMORY_MODULE_INFORMATON 6\r
+#define SMBIOS_TYPE_CACHE_INFORMATION 7\r
+#define SMBIOS_TYPE_PORT_CONNECTOR_INFORMATION 8\r
+#define SMBIOS_TYPE_SYSTEM_SLOTS 9\r
+#define SMBIOS_TYPE_ONBOARD_DEVICE_INFORMATION 10\r
+#define SMBIOS_TYPE_OEM_STRINGS 11\r
+#define SMBIOS_TYPE_SYSTEM_CONFIGURATION_OPTIONS 12\r
+#define SMBIOS_TYPE_BIOS_LANGUAGE_INFORMATION 13\r
+#define SMBIOS_TYPE_GROUP_ASSOCIATIONS 14\r
+#define SMBIOS_TYPE_SYSTEM_EVENT_LOG 15\r
+#define SMBIOS_TYPE_PHYSICAL_MEMORY_ARRAY 16\r
+#define SMBIOS_TYPE_MEMORY_DEVICE 17\r
+#define SMBIOS_TYPE_32BIT_MEMORY_ERROR_INFORMATION 18\r
+#define SMBIOS_TYPE_MEMORY_ARRAY_MAPPED_ADDRESS 19\r
+#define SMBIOS_TYPE_MEMORY_DEVICE_MAPPED_ADDRESS 20\r
+#define SMBIOS_TYPE_BUILT_IN_POINTING_DEVICE 21\r
+#define SMBIOS_TYPE_PORTABLE_BATTERY 22\r
+#define SMBIOS_TYPE_SYSTEM_RESET 23\r
+#define SMBIOS_TYPE_HARDWARE_SECURITY 24\r
+#define SMBIOS_TYPE_SYSTEM_POWER_CONTROLS 25\r
+#define SMBIOS_TYPE_VOLTAGE_PROBE 26\r
+#define SMBIOS_TYPE_COOLING_DEVICE 27\r
+#define SMBIOS_TYPE_TEMPERATURE_PROBE 28\r
+#define SMBIOS_TYPE_ELECTRICAL_CURRENT_PROBE 29\r
+#define SMBIOS_TYPE_OUT_OF_BAND_REMOTE_ACCESS 30\r
+#define SMBIOS_TYPE_BOOT_INTEGRITY_SERVICE 31\r
+#define SMBIOS_TYPE_SYSTEM_BOOT_INFORMATION 32\r
+#define SMBIOS_TYPE_64BIT_MEMORY_ERROR_INFORMATION 33\r
+#define SMBIOS_TYPE_MANAGEMENT_DEVICE 34\r
+#define SMBIOS_TYPE_MANAGEMENT_DEVICE_COMPONENT 35\r
+#define SMBIOS_TYPE_MANAGEMENT_DEVICE_THRESHOLD_DATA 36\r
+#define SMBIOS_TYPE_MEMORY_CHANNEL 37\r
+#define SMBIOS_TYPE_IPMI_DEVICE_INFORMATION 38\r
+#define SMBIOS_TYPE_SYSTEM_POWER_SUPPLY 39\r
+#define SMBIOS_TYPE_ADDITIONAL_INFORMATION 40\r
+#define SMBIOS_TYPE_ONBOARD_DEVICES_EXTENDED_INFORMATION 41\r
+#define SMBIOS_TYPE_MANAGEMENT_CONTROLLER_HOST_INTERFACE 42\r
+#define SMBIOS_TYPE_TPM_DEVICE 43\r
+#define SMBIOS_TYPE_PROCESSOR_ADDITIONAL_INFORMATION 44\r
+\r
///\r
/// Inactive type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.43.\r
-/// Upper-level software that interprets the SMBIOS structure-table should bypass an \r
+/// Upper-level software that interprets the SMBIOS structure-table should bypass an\r
/// Inactive structure just like a structure type that the software does not recognize.\r
///\r
-#define SMBIOS_TYPE_INACTIVE 0x007E \r
+#define SMBIOS_TYPE_INACTIVE 0x007E\r
\r
///\r
/// End-of-table type is added from SMBIOS 2.2. Reference SMBIOS 2.6, chapter 3.3.44.\r
///\r
#define SMBIOS_TYPE_END_OF_TABLE 0x007F\r
\r
+#define SMBIOS_OEM_BEGIN 128\r
+#define SMBIOS_OEM_END 255\r
+\r
+///\r
+/// Types 0 through 127 (7Fh) are reserved for and defined by this\r
+/// specification. Types 128 through 256 (80h to FFh) are available for system- and OEM-specific information.\r
+///\r
+typedef UINT8 SMBIOS_TYPE;\r
+\r
+///\r
+/// Specifies the structure's handle, a unique 16-bit number in the range 0 to 0FFFEh (for version\r
+/// 2.0) or 0 to 0FEFFh (for version 2.1 and later). The handle can be used with the Get SMBIOS\r
+/// Structure function to retrieve a specific structure; the handle numbers are not required to be\r
+/// contiguous. For v2.1 and later, handle values in the range 0FF00h to 0FFFFh are reserved for\r
+/// use by this specification.\r
+/// If the system configuration changes, a previously assigned handle might no longer exist.\r
+/// However once a handle has been assigned by the BIOS, the BIOS cannot re-assign that handle\r
+/// number to another structure.\r
+///\r
+typedef UINT16 SMBIOS_HANDLE;\r
+\r
///\r
/// Smbios Table Entry Point Structure.\r
///\r
/// The Smbios structure header.\r
///\r
typedef struct {\r
- UINT8 Type;\r
- UINT8 Length;\r
- UINT16 Handle;\r
+ SMBIOS_TYPE Type;\r
+ UINT8 Length;\r
+ SMBIOS_HANDLE Handle;\r
} SMBIOS_STRUCTURE;\r
\r
///\r
-/// String Number for a Null terminated string, 00h stands for no string available.\r
+/// Text strings associated with a given SMBIOS structure are returned in the dmiStrucBuffer, appended directly after\r
+/// the formatted portion of the structure. This method of returning string information eliminates the need for\r
+/// application software to deal with pointers embedded in the SMBIOS structure. Each string is terminated with a null\r
+/// (00h) BYTE and the set of strings is terminated with an additional null (00h) BYTE. When the formatted portion of\r
+/// a SMBIOS structure references a string, it does so by specifying a non-zero string number within the structure's\r
+/// string-set. For example, if a string field contains 02h, it references the second string following the formatted portion\r
+/// of the SMBIOS structure. If a string field references no string, a null (0) is placed in that string field. If the\r
+/// formatted portion of the structure contains string-reference fields and all the string fields are set to 0 (no string\r
+/// references), the formatted section of the structure is followed by two null (00h) BYTES.\r
///\r
typedef UINT8 SMBIOS_TABLE_STRING;\r
\r
UINT32 PrinterIsSupported :1;\r
UINT32 CgaMonoIsSupported :1;\r
UINT32 NecPc98 :1;\r
- UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor \r
- ///< and bits 48-63 reserved for System Vendor. \r
+ UINT32 ReservedForVendor :32; ///< Bits 32-63. Bits 32-47 reserved for BIOS vendor\r
+ ///< and bits 48-63 reserved for System Vendor.\r
} MISC_BIOS_CHARACTERISTICS;\r
\r
///\r
MBCE_SYSTEM_RESERVED SystemReserved;\r
} MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
\r
+///\r
+/// Extended BIOS ROM size.\r
+///\r
+typedef struct {\r
+ UINT16 Size :14;\r
+ UINT16 Unit :2;\r
+} EXTENDED_BIOS_ROM_SIZE;\r
+\r
///\r
/// BIOS Information (Type 0).\r
///\r
UINT8 SystemBiosMinorRelease;\r
UINT8 EmbeddedControllerFirmwareMajorRelease;\r
UINT8 EmbeddedControllerFirmwareMinorRelease;\r
+ //\r
+ // Add for smbios 3.1.0\r
+ //\r
+ EXTENDED_BIOS_ROM_SIZE ExtendedBiosSize;\r
} SMBIOS_TABLE_TYPE0;\r
\r
///\r
/// System Wake-up Type.\r
///\r
-typedef enum { \r
+typedef enum {\r
SystemWakeupTypeReserved = 0x00,\r
SystemWakeupTypeOther = 0x01,\r
SystemWakeupTypeUnknown = 0x02,\r
\r
///\r
/// System Information (Type 1).\r
-/// \r
-/// The information in this structure defines attributes of the overall system and is \r
+///\r
+/// The information in this structure defines attributes of the overall system and is\r
/// intended to be associated with the Component ID group of the system's MIF.\r
-/// An SMBIOS implementation is associated with a single system instance and contains \r
+/// An SMBIOS implementation is associated with a single system instance and contains\r
/// one and only one System Information (Type 1) structure.\r
///\r
typedef struct {\r
} SMBIOS_TABLE_TYPE1;\r
\r
///\r
-/// Base Board - Feature Flags. \r
+/// Base Board - Feature Flags.\r
///\r
typedef struct {\r
UINT8 Motherboard :1;\r
///\r
/// Base Board - Board Type.\r
///\r
-typedef enum { \r
+typedef enum {\r
BaseBoardTypeUnknown = 0x1,\r
BaseBoardTypeOther = 0x2,\r
BaseBoardTypeServerBlade = 0x3,\r
///\r
/// Base Board (or Module) Information (Type 2).\r
///\r
-/// The information in this structure defines attributes of a system baseboard - \r
+/// The information in this structure defines attributes of a system baseboard -\r
/// for example a motherboard, planar, or server blade or other standard system module.\r
///\r
typedef struct {\r
///\r
/// System Enclosure or Chassis Types\r
///\r
-typedef enum { \r
+typedef enum {\r
MiscChassisTypeOther = 0x01,\r
MiscChassisTypeUnknown = 0x02,\r
MiscChassisTypeDeskTop = 0x03,\r
MiscChassisBladeEnclosure = 0x1D,\r
MiscChassisTablet = 0x1E,\r
MiscChassisConvertible = 0x1F,\r
- MiscChassisDetachable = 0x20\r
+ MiscChassisDetachable = 0x20,\r
+ MiscChassisIoTGateway = 0x21,\r
+ MiscChassisEmbeddedPc = 0x22,\r
+ MiscChassisMiniPc = 0x23,\r
+ MiscChassisStickPc = 0x24\r
} MISC_CHASSIS_TYPE;\r
\r
///\r
/// System Enclosure or Chassis States .\r
///\r
-typedef enum { \r
+typedef enum {\r
ChassisStateOther = 0x01,\r
ChassisStateUnknown = 0x02,\r
ChassisStateSafe = 0x03,\r
///\r
/// System Enclosure or Chassis Security Status.\r
///\r
-typedef enum { \r
+typedef enum {\r
ChassisSecurityStatusOther = 0x01,\r
ChassisSecurityStatusUnknown = 0x02,\r
ChassisSecurityStatusNone = 0x03,\r
///\r
/// System Enclosure or Chassis (Type 3).\r
///\r
-/// The information in this structure defines attributes of the system's mechanical enclosure(s). \r
-/// For example, if a system included a separate enclosure for its peripheral devices, \r
+/// The information in this structure defines attributes of the system's mechanical enclosure(s).\r
+/// For example, if a system included a separate enclosure for its peripheral devices,\r
/// two structures would be returned: one for the main, system enclosure and the second for\r
/// the peripheral device enclosure. The additions to this structure in v2.1 of this specification\r
-/// support the population of the CIM_Chassis class. \r
+/// support the population of the CIM_Chassis class.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
UINT8 NumberofPowerCords;\r
UINT8 ContainedElementCount;\r
UINT8 ContainedElementRecordLength;\r
+ //\r
+ // Can have 0 to (ContainedElementCount * ContainedElementRecordLength) contained elements\r
+ //\r
CONTAINED_ELEMENT ContainedElements[1];\r
+ //\r
+ // Add for smbios 2.7\r
+ //\r
+ // Since ContainedElements has a variable number of entries, must not define SKUNumber in\r
+ // the structure. Need to reference it by starting at offset 0x15 and adding\r
+ // (ContainedElementCount * ContainedElementRecordLength) bytes.\r
+ //\r
+ // SMBIOS_TABLE_STRING SKUNumber;\r
} SMBIOS_TABLE_TYPE3;\r
\r
///\r
/// Processor Information - Processor Family.\r
///\r
typedef enum {\r
- ProcessorFamilyOther = 0x01, \r
+ ProcessorFamilyOther = 0x01,\r
ProcessorFamilyUnknown = 0x02,\r
- ProcessorFamily8086 = 0x03, \r
+ ProcessorFamily8086 = 0x03,\r
ProcessorFamily80286 = 0x04,\r
- ProcessorFamilyIntel386 = 0x05, \r
+ ProcessorFamilyIntel386 = 0x05,\r
ProcessorFamilyIntel486 = 0x06,\r
ProcessorFamily8087 = 0x07,\r
ProcessorFamily80287 = 0x08,\r
- ProcessorFamily80387 = 0x09, \r
+ ProcessorFamily80387 = 0x09,\r
ProcessorFamily80487 = 0x0A,\r
- ProcessorFamilyPentium = 0x0B, \r
+ ProcessorFamilyPentium = 0x0B,\r
ProcessorFamilyPentiumPro = 0x0C,\r
ProcessorFamilyPentiumII = 0x0D,\r
ProcessorFamilyPentiumMMX = 0x0E,\r
ProcessorFamilyCeleron = 0x0F,\r
ProcessorFamilyPentiumIIXeon = 0x10,\r
- ProcessorFamilyPentiumIII = 0x11, \r
+ ProcessorFamilyPentiumIII = 0x11,\r
ProcessorFamilyM1 = 0x12,\r
ProcessorFamilyM2 = 0x13,\r
ProcessorFamilyIntelCeleronM = 0x14,\r
ProcessorFamilyIntelPentium4Ht = 0x15,\r
ProcessorFamilyAmdDuron = 0x18,\r
- ProcessorFamilyK5 = 0x19, \r
+ ProcessorFamilyK5 = 0x19,\r
ProcessorFamilyK6 = 0x1A,\r
ProcessorFamilyK6_2 = 0x1B,\r
ProcessorFamilyK6_3 = 0x1C,\r
ProcessorFamilyIntelCoreSoloMobile = 0x2A,\r
ProcessorFamilyIntelAtom = 0x2B,\r
ProcessorFamilyIntelCoreM = 0x2C,\r
+ ProcessorFamilyIntelCorem3 = 0x2D,\r
+ ProcessorFamilyIntelCorem5 = 0x2E,\r
+ ProcessorFamilyIntelCorem7 = 0x2F,\r
ProcessorFamilyAlpha = 0x30,\r
ProcessorFamilyAlpha21064 = 0x31,\r
ProcessorFamilyAlpha21066 = 0x32,\r
ProcessorFamilyAmdAthlonX4QuadCore = 0x66,\r
ProcessorFamilyAmdOpteronX1000Series = 0x67,\r
ProcessorFamilyAmdOpteronX2000Series = 0x68,\r
+ ProcessorFamilyAmdOpteronASeries = 0x69,\r
+ ProcessorFamilyAmdOpteronX3000Series = 0x6A,\r
+ ProcessorFamilyAmdZen = 0x6B,\r
ProcessorFamilyHobbit = 0x70,\r
ProcessorFamilyCrusoeTM5000 = 0x78,\r
ProcessorFamilyCrusoeTM3000 = 0x79,\r
ProcessorFamilyAmdPhenomFxQuadCore = 0x8C,\r
ProcessorFamilyAmdPhenomX4QuadCore = 0x8D,\r
ProcessorFamilyAmdPhenomX2DualCore = 0x8E,\r
- ProcessorFamilyAmdAthlonX2DualCore = 0x8F, \r
+ ProcessorFamilyAmdAthlonX2DualCore = 0x8F,\r
ProcessorFamilyPARISC = 0x90,\r
ProcessorFamilyPaRisc8500 = 0x91,\r
ProcessorFamilyPaRisc8000 = 0x92,\r
ProcessorFamilyIntelCore2DuoMobile = 0xC4,\r
ProcessorFamilyIntelCore2SoloMobile = 0xC5,\r
ProcessorFamilyIntelCoreI7 = 0xC6,\r
- ProcessorFamilyDualCoreIntelCeleron = 0xC7, \r
+ ProcessorFamilyDualCoreIntelCeleron = 0xC7,\r
ProcessorFamilyIBM390 = 0xC8,\r
ProcessorFamilyG4 = 0xC9,\r
ProcessorFamilyG5 = 0xCA,\r
ProcessorFamilyzArchitecture = 0xCC,\r
ProcessorFamilyIntelCoreI5 = 0xCD,\r
ProcessorFamilyIntelCoreI3 = 0xCE,\r
+ ProcessorFamilyIntelCoreI9 = 0xCF,\r
ProcessorFamilyViaC7M = 0xD2,\r
ProcessorFamilyViaC7D = 0xD3,\r
ProcessorFamilyViaC7 = 0xD4,\r
/// Processor Information2 - Processor Family2.\r
///\r
typedef enum {\r
+ ProcessorFamilyARMv7 = 0x0100,\r
+ ProcessorFamilyARMv8 = 0x0101,\r
ProcessorFamilySH3 = 0x0104,\r
ProcessorFamilySH4 = 0x0105,\r
ProcessorFamilyARM = 0x0118,\r
ProcessorFamilyMII = 0x012E,\r
ProcessorFamilyWinChip = 0x0140,\r
ProcessorFamilyDSP = 0x015E,\r
- ProcessorFamilyVideoProcessor = 0x01F4\r
+ ProcessorFamilyVideoProcessor = 0x01F4,\r
+ ProcessorFamilyRiscvRV32 = 0x0200,\r
+ ProcessorFamilyRiscVRV64 = 0x0201,\r
+ ProcessorFamilyRiscVRV128 = 0x0202\r
} PROCESSOR_FAMILY2_DATA;\r
\r
///\r
-/// Processor Information - Voltage. \r
+/// Processor Information - Voltage.\r
///\r
typedef struct {\r
- UINT8 ProcessorVoltageCapability5V :1; \r
- UINT8 ProcessorVoltageCapability3_3V :1; \r
- UINT8 ProcessorVoltageCapability2_9V :1; \r
+ UINT8 ProcessorVoltageCapability5V :1;\r
+ UINT8 ProcessorVoltageCapability3_3V :1;\r
+ UINT8 ProcessorVoltageCapability2_9V :1;\r
UINT8 ProcessorVoltageCapabilityReserved :1; ///< Bit 3, must be zero.\r
UINT8 ProcessorVoltageReserved :3; ///< Bits 4-6, must be zero.\r
UINT8 ProcessorVoltageIndicateLegacy :1;\r
ProcessorUpgradeSocketLGA1150 = 0x2D,\r
ProcessorUpgradeSocketBGA1168 = 0x2E,\r
ProcessorUpgradeSocketBGA1234 = 0x2F,\r
- ProcessorUpgradeSocketBGA1364 = 0x30\r
+ ProcessorUpgradeSocketBGA1364 = 0x30,\r
+ ProcessorUpgradeSocketAM4 = 0x31,\r
+ ProcessorUpgradeSocketLGA1151 = 0x32,\r
+ ProcessorUpgradeSocketBGA1356 = 0x33,\r
+ ProcessorUpgradeSocketBGA1440 = 0x34,\r
+ ProcessorUpgradeSocketBGA1515 = 0x35,\r
+ ProcessorUpgradeSocketLGA3647_1 = 0x36,\r
+ ProcessorUpgradeSocketSP3 = 0x37,\r
+ ProcessorUpgradeSocketSP3r2 = 0x38,\r
+ ProcessorUpgradeSocketLGA2066 = 0x39,\r
+ ProcessorUpgradeSocketBGA1392 = 0x3A,\r
+ ProcessorUpgradeSocketBGA1510 = 0x3B,\r
+ ProcessorUpgradeSocketBGA1528 = 0x3C\r
} PROCESSOR_UPGRADE;\r
\r
///\r
UINT32 ProcessorReserved4 :2;\r
} PROCESSOR_FEATURE_FLAGS;\r
\r
+typedef struct {\r
+ UINT32 ProcessorReserved1 :1;\r
+ UINT32 ProcessorUnknown :1;\r
+ UINT32 Processor64BitCapble :1;\r
+ UINT32 ProcessorMultiCore :1;\r
+ UINT32 ProcessorHardwareThread :1;\r
+ UINT32 ProcessorExecuteProtection :1;\r
+ UINT32 ProcessorEnhancedVirtulization :1;\r
+ UINT32 ProcessorPowerPerformanceCtrl :1;\r
+ UINT32 Processor128bitCapble :1;\r
+ UINT32 ProcessorReserved2 :7;\r
+} PROCESSOR_CHARACTERISTIC_FLAGS;\r
+\r
typedef struct {\r
PROCESSOR_SIGNATURE Signature;\r
PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
///\r
/// Processor Information (Type 4).\r
///\r
-/// The information in this structure defines the attributes of a single processor; \r
-/// a separate structure instance is provided for each system processor socket/slot. \r
-/// For example, a system with an IntelDX2 processor would have a single \r
+/// The information in this structure defines the attributes of a single processor;\r
+/// a separate structure instance is provided for each system processor socket/slot.\r
+/// For example, a system with an IntelDX2 processor would have a single\r
/// structure instance, while a system with an IntelSX2 processor would have a structure\r
-/// to describe the main CPU, and a second structure to describe the 80487 co-processor. \r
+/// to describe the main CPU, and a second structure to describe the 80487 co-processor.\r
///\r
-typedef struct { \r
+typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
SMBIOS_TABLE_STRING Socket;\r
UINT8 ProcessorType; ///< The enumeration value from PROCESSOR_TYPE_DATA.\r
///\r
/// Memory Controller Error Detecting Method.\r
///\r
-typedef enum { \r
+typedef enum {\r
ErrorDetectingMethodOther = 0x01,\r
ErrorDetectingMethodUnknown = 0x02,\r
ErrorDetectingMethodNone = 0x03,\r
///\r
/// Memory Controller Information - Interleave Support.\r
///\r
-typedef enum { \r
+typedef enum {\r
MemoryInterleaveOther = 0x01,\r
MemoryInterleaveUnknown = 0x02,\r
MemoryInterleaveOneWay = 0x03,\r
///\r
/// Memory Controller Information (Type 5, Obsolete).\r
///\r
-/// The information in this structure defines the attributes of the system's memory controller(s) \r
-/// and the supported attributes of any memory-modules present in the sockets controlled by \r
-/// this controller. \r
-/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete), \r
+/// The information in this structure defines the attributes of the system's memory controller(s)\r
+/// and the supported attributes of any memory-modules present in the sockets controlled by\r
+/// this controller.\r
+/// Note: This structure, and its companion Memory Module Information (Type 6, Obsolete),\r
/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
/// and Memory Device (Type 17) structures should be used instead. BIOS providers might\r
/// choose to implement both memory description types to allow existing DMI browsers\r
UINT8 ErrDetectMethod; ///< The enumeration value from MEMORY_ERROR_DETECT_METHOD.\r
MEMORY_ERROR_CORRECT_CAPABILITY ErrCorrectCapability;\r
UINT8 SupportInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE.\r
- UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE . \r
+ UINT8 CurrentInterleave; ///< The enumeration value from MEMORY_SUPPORT_INTERLEAVE_TYPE .\r
UINT8 MaxMemoryModuleSize;\r
MEMORY_SPEED_TYPE SupportSpeed;\r
UINT16 SupportMemoryType;\r
///\r
/// Memory Module Information (Type 6, Obsolete)\r
///\r
-/// One Memory Module Information structure is included for each memory-module socket \r
+/// One Memory Module Information structure is included for each memory-module socket\r
/// in the system. The structure describes the speed, type, size, and error status\r
-/// of each system memory module. The supported attributes of each module are described \r
-/// by the "owning" Memory Controller Information structure. \r
-/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete), \r
+/// of each system memory module. The supported attributes of each module are described\r
+/// by the "owning" Memory Controller Information structure.\r
+/// Note: This structure, and its companion Memory Controller Information (Type 5, Obsolete),\r
/// are obsolete starting with version 2.1 of this specification. The Physical Memory Array (Type 16)\r
/// and Memory Device (Type 17) structures should be used instead.\r
///\r
} CACHE_ERROR_TYPE_DATA;\r
\r
///\r
-/// Cache Information - System Cache Type. \r
+/// Cache Information - System Cache Type.\r
///\r
typedef enum {\r
CacheTypeOther = 0x01,\r
} CACHE_TYPE_DATA;\r
\r
///\r
-/// Cache Information - Associativity. \r
+/// Cache Information - Associativity.\r
///\r
typedef enum {\r
CacheAssociativityOther = 0x01,\r
///\r
/// Cache Information (Type 7).\r
///\r
-/// The information in this structure defines the attributes of CPU cache device in the system. \r
+/// The information in this structure defines the attributes of CPU cache device in the system.\r
/// One structure is specified for each such device, whether the device is internal to\r
/// or external to the CPU module. Cache modules can be associated with a processor structure\r
/// in one or two ways, depending on the SMBIOS version.\r
UINT8 ErrorCorrectionType; ///< The enumeration value from CACHE_ERROR_TYPE_DATA.\r
UINT8 SystemCacheType; ///< The enumeration value from CACHE_TYPE_DATA.\r
UINT8 Associativity; ///< The enumeration value from CACHE_ASSOCIATIVITY_DATA.\r
+ //\r
+ // Add for smbios 3.1.0\r
+ //\r
+ UINT32 MaximumCacheSize2;\r
+ UINT32 InstalledSize2;\r
} SMBIOS_TABLE_TYPE7;\r
\r
///\r
-/// Port Connector Information - Connector Types. \r
+/// Port Connector Information - Connector Types.\r
///\r
typedef enum {\r
PortConnectorTypeNone = 0x00,\r
PortConnectorTypeBNC = 0x20,\r
PortConnectorType1394 = 0x21,\r
PortConnectorTypeSasSata = 0x22,\r
+ PortConnectorTypeUsbTypeC = 0x23,\r
PortConnectorTypePC98 = 0xA0,\r
PortConnectorTypePC98Hireso = 0xA1,\r
PortConnectorTypePCH98 = 0xA2,\r
} MISC_PORT_CONNECTOR_TYPE;\r
\r
///\r
-/// Port Connector Information - Port Types \r
+/// Port Connector Information - Port Types\r
///\r
typedef enum {\r
PortTypeNone = 0x00,\r
PortTypeAudioPort = 0x1D,\r
PortTypeModemPort = 0x1E,\r
PortTypeNetworkPort = 0x1F,\r
+ PortTypeSata = 0x20,\r
+ PortTypeSas = 0x21,\r
+ PortTypeMfdp = 0x22, ///< Multi-Function Display Port\r
+ PortTypeThunderbolt = 0x23,\r
PortType8251Compatible = 0xA0,\r
PortType8251FifoCompatible = 0xA1,\r
PortTypeOther = 0xFF\r
///\r
/// Port Connector Information (Type 8).\r
///\r
-/// The information in this structure defines the attributes of a system port connector, \r
-/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information \r
+/// The information in this structure defines the attributes of a system port connector,\r
+/// e.g. parallel, serial, keyboard, or mouse ports. The port's type and connector information\r
/// are provided. One structure is present for each port provided by the system.\r
///\r
typedef struct {\r
SlotTypeMxm30TypeB = 0x1E,\r
SlotTypePciExpressGen2Sff_8639 = 0x1F,\r
SlotTypePciExpressGen3Sff_8639 = 0x20,\r
+ SlotTypePciExpressMini52pinWithBSKO = 0x21, ///< PCI Express Mini 52-pin (CEM spec. 2.0) with bottom-side keep-outs.\r
+ SlotTypePciExpressMini52pinWithoutBSKO = 0x22, ///< PCI Express Mini 52-pin (CEM spec. 2.0) without bottom-side keep-outs.\r
+ SlotTypePciExpressMini76pin = 0x23, ///< PCI Express Mini 76-pin (CEM spec. 2.0) Corresponds to Display-Mini card.\r
+ SlotTypeCXLFlexbus10 = 0x30,\r
SlotTypePC98C20 = 0xA0,\r
SlotTypePC98C24 = 0xA1,\r
SlotTypePC98E = 0xA2,\r
SlotTypePciExpressGen3X2 = 0xB3,\r
SlotTypePciExpressGen3X4 = 0xB4,\r
SlotTypePciExpressGen3X8 = 0xB5,\r
- SlotTypePciExpressGen3X16 = 0xB6\r
+ SlotTypePciExpressGen3X16 = 0xB6,\r
+ SlotTypePciExpressGen4 = 0xB8,\r
+ SlotTypePciExpressGen4X1 = 0xB9,\r
+ SlotTypePciExpressGen4X2 = 0xBA,\r
+ SlotTypePciExpressGen4X4 = 0xBB,\r
+ SlotTypePciExpressGen4X8 = 0xBC,\r
+ SlotTypePciExpressGen4X16 = 0xBD\r
} MISC_SLOT_TYPE;\r
\r
///\r
/// System Slots - Current Usage.\r
///\r
typedef enum {\r
- SlotUsageOther = 0x01,\r
- SlotUsageUnknown = 0x02,\r
- SlotUsageAvailable = 0x03,\r
- SlotUsageInUse = 0x04\r
+ SlotUsageOther = 0x01,\r
+ SlotUsageUnknown = 0x02,\r
+ SlotUsageAvailable = 0x03,\r
+ SlotUsageInUse = 0x04,\r
+ SlotUsageUnavailable = 0x05\r
} MISC_SLOT_USAGE;\r
\r
///\r
-/// System Slots - Slot Length. \r
+/// System Slots - Slot Length.\r
///\r
typedef enum {\r
SlotLengthOther = 0x01,\r
} MISC_SLOT_LENGTH;\r
\r
///\r
-/// System Slots - Slot Characteristics 1. \r
+/// System Slots - Slot Characteristics 1.\r
///\r
typedef struct {\r
UINT8 CharacteristicsUnknown :1;\r
UINT8 ModemRingResumeSupported:1;\r
} MISC_SLOT_CHARACTERISTICS1;\r
///\r
-/// System Slots - Slot Characteristics 2. \r
+/// System Slots - Slot Characteristics 2.\r
///\r
typedef struct {\r
UINT8 PmeSignalSupported :1;\r
UINT8 HotPlugDevicesSupported :1;\r
UINT8 SmbusSignalSupported :1;\r
- UINT8 Reserved :5; ///< Set to 0.\r
+ UINT8 BifurcationSupported :1;\r
+ UINT8 Reserved :4; ///< Set to 0.\r
} MISC_SLOT_CHARACTERISTICS2;\r
\r
+///\r
+/// System Slots - Peer Segment/Bus/Device/Function/Width Groups\r
+///\r
+typedef struct {\r
+ UINT16 SegmentGroupNum;\r
+ UINT8 BusNum;\r
+ UINT8 DevFuncNum;\r
+ UINT8 DataBusWidth;\r
+} MISC_SLOT_PEER_GROUP;\r
+\r
///\r
/// System Slots (Type 9)\r
///\r
-/// The information in this structure defines the attributes of a system slot. \r
+/// The information in this structure defines the attributes of a system slot.\r
/// One structure is provided for each slot in the system.\r
///\r
///\r
UINT16 SegmentGroupNum;\r
UINT8 BusNum;\r
UINT8 DevFuncNum;\r
+ //\r
+ // Add for smbios 3.2\r
+ //\r
+ UINT8 DataBusWidth;\r
+ UINT8 PeerGroupingCount;\r
+ MISC_SLOT_PEER_GROUP PeerGroups[1];\r
} SMBIOS_TABLE_TYPE9;\r
\r
///\r
-/// On Board Devices Information - Device Types. \r
+/// On Board Devices Information - Device Types.\r
///\r
typedef enum {\r
OnBoardDeviceTypeOther = 0x01,\r
///\r
/// On Board Devices Information (Type 10, obsolete).\r
///\r
-/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended \r
-/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both \r
-/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information. \r
-/// The information in this structure defines the attributes of devices that are onboard (soldered onto) \r
+/// Note: This structure is obsolete starting with version 2.6 specification; the Onboard Devices Extended\r
+/// Information (Type 41) structure should be used instead . BIOS providers can choose to implement both\r
+/// types to allow existing SMBIOS browsers to properly display the system's onboard devices information.\r
+/// The information in this structure defines the attributes of devices that are onboard (soldered onto)\r
/// a system element, usually the baseboard. In general, an entry in this table implies that the BIOS\r
/// has some level of control over the enabling of the associated device for use by the system.\r
///\r
\r
///\r
/// OEM Strings (Type 11).\r
-/// This structure contains free form strings defined by the OEM. Examples of this are: \r
-/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc. \r
+/// This structure contains free form strings defined by the OEM. Examples of this are:\r
+/// Part Numbers for Reference Documents for the system, contact information for the manufacturer, etc.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// System Configuration Options (Type 12).\r
///\r
-/// This structure contains information required to configure the base board's Jumpers and Switches. \r
+/// This structure contains information required to configure the base board's Jumpers and Switches.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// BIOS Language Information (Type 13).\r
///\r
-/// The information in this structure defines the installable language attributes of the BIOS. \r
-/// \r
+/// The information in this structure defines the installable language attributes of the BIOS.\r
+///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
UINT8 InstallableLanguages;\r
///\r
/// Group Associations (Type 14).\r
///\r
-/// The Group Associations structure is provided for OEMs who want to specify \r
-/// the arrangement or hierarchy of certain components (including other Group Associations) \r
-/// within the system. \r
+/// The Group Associations structure is provided for OEMs who want to specify\r
+/// the arrangement or hierarchy of certain components (including other Group Associations)\r
+/// within the system.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
\r
///\r
/// System Event Log - Event Log Types.\r
-/// \r
+///\r
typedef enum {\r
EventLogTypeReserved = 0x00,\r
EventLogTypeSingleBitECC = 0x01,\r
} EVENT_LOG_TYPE_DATA;\r
\r
///\r
-/// System Event Log - Variable Data Format Types. \r
-/// \r
+/// System Event Log - Variable Data Format Types.\r
+///\r
typedef enum {\r
EventLogVariableNone = 0x00,\r
EventLogVariableHandle = 0x01,\r
EventLogVariableMutilEventHandle = 0x03,\r
EventLogVariablePOSTResultBitmap = 0x04,\r
EventLogVariableSysManagementType = 0x05,\r
- EventLogVariableMutliEventSysManagmentType = 0x06, \r
+ EventLogVariableMutliEventSysManagmentType = 0x06,\r
EventLogVariableUnused = 0x07,\r
EventLogVariableOEMAssigned = 0x80\r
} EVENT_LOG_VARIABLE_DATA;\r
///\r
/// System Event Log (Type 15).\r
///\r
-/// The presence of this structure within the SMBIOS data returned for a system indicates \r
-/// that the system supports an event log. An event log is a fixed-length area within a \r
-/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header \r
-/// record, followed by one or more variable-length log records. \r
+/// The presence of this structure within the SMBIOS data returned for a system indicates\r
+/// that the system supports an event log. An event log is a fixed-length area within a\r
+/// non-volatile storage element, starting with a fixed-length (and vendor-specific) header\r
+/// record, followed by one or more variable-length log records.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
MemoryArrayLocationPc98C20AddonCard = 0xA0,\r
MemoryArrayLocationPc98C24AddonCard = 0xA1,\r
MemoryArrayLocationPc98EAddonCard = 0xA2,\r
- MemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
+ MemoryArrayLocationPc98LocalBusAddonCard = 0xA3,\r
+ MemoryArrayLocationCXLFlexbus10AddonCard = 0xA4\r
} MEMORY_ARRAY_LOCATION;\r
\r
///\r
} MEMORY_ARRAY_USE;\r
\r
///\r
-/// Physical Memory Array - Error Correction Types. \r
+/// Physical Memory Array - Error Correction Types.\r
///\r
typedef enum {\r
MemoryErrorCorrectionOther = 0x01,\r
///\r
/// Physical Memory Array (Type 16).\r
///\r
-/// This structure describes a collection of memory devices that operate \r
-/// together to form a memory address space. \r
+/// This structure describes a collection of memory devices that operate\r
+/// together to form a memory address space.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
MemoryFormFactorRimm = 0x0C,\r
MemoryFormFactorSodimm = 0x0D,\r
MemoryFormFactorSrimm = 0x0E,\r
- MemoryFormFactorFbDimm = 0x0F\r
+ MemoryFormFactorFbDimm = 0x0F,\r
+ MemoryFormFactorDie = 0x10\r
} MEMORY_FORM_FACTOR;\r
\r
///\r
MemoryTypeLpddr = 0x1B,\r
MemoryTypeLpddr2 = 0x1C,\r
MemoryTypeLpddr3 = 0x1D,\r
- MemoryTypeLpddr4 = 0x1E\r
+ MemoryTypeLpddr4 = 0x1E,\r
+ MemoryTypeLogicalNonVolatileDevice = 0x1F,\r
+ MemoryTypeHBM = 0x20,\r
+ MemoryTypeHBM2 = 0x21\r
} MEMORY_DEVICE_TYPE;\r
\r
+///\r
+/// Memory Device - Type Detail\r
+///\r
typedef struct {\r
UINT16 Reserved :1;\r
UINT16 Other :1;\r
UINT16 LrDimm :1;\r
} MEMORY_DEVICE_TYPE_DETAIL;\r
\r
+///\r
+/// Memory Device - Memory Technology\r
+///\r
+typedef enum {\r
+ MemoryTechnologyOther = 0x01,\r
+ MemoryTechnologyUnknown = 0x02,\r
+ MemoryTechnologyDram = 0x03,\r
+ MemoryTechnologyNvdimmN = 0x04,\r
+ MemoryTechnologyNvdimmF = 0x05,\r
+ MemoryTechnologyNvdimmP = 0x06,\r
+ MemoryTechnologyIntelPersistentMemory = 0x07\r
+} MEMORY_DEVICE_TECHNOLOGY;\r
+\r
+///\r
+/// Memory Device - Memory Operating Mode Capability\r
+///\r
+typedef union {\r
+ ///\r
+ /// Individual bit fields\r
+ ///\r
+ struct {\r
+ UINT16 Reserved :1; ///< Set to 0.\r
+ UINT16 Other :1;\r
+ UINT16 Unknown :1;\r
+ UINT16 VolatileMemory :1;\r
+ UINT16 ByteAccessiblePersistentMemory :1;\r
+ UINT16 BlockAccessiblePersistentMemory :1;\r
+ UINT16 Reserved2 :10; ///< Set to 0.\r
+ } Bits;\r
+ ///\r
+ /// All bit fields as a 16-bit value\r
+ ///\r
+ UINT16 Uint16;\r
+} MEMORY_DEVICE_OPERATING_MODE_CAPABILITY;\r
+\r
///\r
/// Memory Device (Type 17).\r
///\r
-/// This structure describes a single memory device that is part of \r
+/// This structure describes a single memory device that is part of\r
/// a larger Physical Memory Array (Type 16).\r
-/// Note: If a system includes memory-device sockets, the SMBIOS implementation \r
-/// includes a Memory Device structure instance for each slot, whether or not the \r
+/// Note: If a system includes memory-device sockets, the SMBIOS implementation\r
+/// includes a Memory Device structure instance for each slot, whether or not the\r
/// socket is currently populated.\r
///\r
typedef struct {\r
- SMBIOS_STRUCTURE Hdr;\r
- UINT16 MemoryArrayHandle;\r
- UINT16 MemoryErrorInformationHandle;\r
- UINT16 TotalWidth;\r
- UINT16 DataWidth;\r
- UINT16 Size;\r
- UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
- UINT8 DeviceSet;\r
- SMBIOS_TABLE_STRING DeviceLocator;\r
- SMBIOS_TABLE_STRING BankLocator;\r
- UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
- MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
- UINT16 Speed;\r
- SMBIOS_TABLE_STRING Manufacturer;\r
- SMBIOS_TABLE_STRING SerialNumber;\r
- SMBIOS_TABLE_STRING AssetTag;\r
- SMBIOS_TABLE_STRING PartNumber;\r
+ SMBIOS_STRUCTURE Hdr;\r
+ UINT16 MemoryArrayHandle;\r
+ UINT16 MemoryErrorInformationHandle;\r
+ UINT16 TotalWidth;\r
+ UINT16 DataWidth;\r
+ UINT16 Size;\r
+ UINT8 FormFactor; ///< The enumeration value from MEMORY_FORM_FACTOR.\r
+ UINT8 DeviceSet;\r
+ SMBIOS_TABLE_STRING DeviceLocator;\r
+ SMBIOS_TABLE_STRING BankLocator;\r
+ UINT8 MemoryType; ///< The enumeration value from MEMORY_DEVICE_TYPE.\r
+ MEMORY_DEVICE_TYPE_DETAIL TypeDetail;\r
+ UINT16 Speed;\r
+ SMBIOS_TABLE_STRING Manufacturer;\r
+ SMBIOS_TABLE_STRING SerialNumber;\r
+ SMBIOS_TABLE_STRING AssetTag;\r
+ SMBIOS_TABLE_STRING PartNumber;\r
//\r
// Add for smbios 2.6\r
- // \r
- UINT8 Attributes;\r
+ //\r
+ UINT8 Attributes;\r
//\r
// Add for smbios 2.7\r
//\r
- UINT32 ExtendedSize;\r
- UINT16 ConfiguredMemoryClockSpeed;\r
+ UINT32 ExtendedSize;\r
+ //\r
+ // Keep using name "ConfiguredMemoryClockSpeed" for compatibility\r
+ // although this field is renamed from "Configured Memory Clock Speed"\r
+ // to "Configured Memory Speed" in smbios 3.2.0.\r
+ //\r
+ UINT16 ConfiguredMemoryClockSpeed;\r
//\r
// Add for smbios 2.8.0\r
//\r
- UINT16 MinimumVoltage;\r
- UINT16 MaximumVoltage;\r
- UINT16 ConfiguredVoltage;\r
+ UINT16 MinimumVoltage;\r
+ UINT16 MaximumVoltage;\r
+ UINT16 ConfiguredVoltage;\r
+ //\r
+ // Add for smbios 3.2.0\r
+ //\r
+ UINT8 MemoryTechnology; ///< The enumeration value from MEMORY_DEVICE_TECHNOLOGY\r
+ MEMORY_DEVICE_OPERATING_MODE_CAPABILITY MemoryOperatingModeCapability;\r
+ SMBIOS_TABLE_STRING FirwareVersion;\r
+ UINT16 ModuleManufacturerID;\r
+ UINT16 ModuleProductID;\r
+ UINT16 MemorySubsystemControllerManufacturerID;\r
+ UINT16 MemorySubsystemControllerProductID;\r
+ UINT64 NonVolatileSize;\r
+ UINT64 VolatileSize;\r
+ UINT64 CacheSize;\r
+ UINT64 LogicalSize;\r
} SMBIOS_TABLE_TYPE17;\r
\r
///\r
-/// 32-bit Memory Error Information - Error Type. \r
+/// 32-bit Memory Error Information - Error Type.\r
///\r
-typedef enum { \r
+typedef enum {\r
MemoryErrorOther = 0x01,\r
MemoryErrorUnknown = 0x02,\r
MemoryErrorOk = 0x03,\r
} MEMORY_ERROR_TYPE;\r
\r
///\r
-/// 32-bit Memory Error Information - Error Granularity. \r
+/// 32-bit Memory Error Information - Error Granularity.\r
///\r
-typedef enum { \r
+typedef enum {\r
MemoryGranularityOther = 0x01,\r
MemoryGranularityOtherUnknown = 0x02,\r
MemoryGranularityDeviceLevel = 0x03,\r
} MEMORY_ERROR_GRANULARITY;\r
\r
///\r
-/// 32-bit Memory Error Information - Error Operation. \r
+/// 32-bit Memory Error Information - Error Operation.\r
///\r
-typedef enum { \r
+typedef enum {\r
MemoryErrorOperationOther = 0x01,\r
MemoryErrorOperationUnknown = 0x02,\r
MemoryErrorOperationRead = 0x03,\r
\r
///\r
/// 32-bit Memory Error Information (Type 18).\r
-/// \r
-/// This structure identifies the specifics of an error that might be detected \r
+///\r
+/// This structure identifies the specifics of an error that might be detected\r
/// within a Physical Memory Array.\r
///\r
typedef struct {\r
///\r
/// Memory Array Mapped Address (Type 19).\r
///\r
-/// This structure provides the address mapping for a Physical Memory Array. \r
+/// This structure provides the address mapping for a Physical Memory Array.\r
/// One structure is present for each contiguous address range described.\r
///\r
typedef struct {\r
///\r
/// Memory Device Mapped Address (Type 20).\r
///\r
-/// This structure maps memory address space usually to a device-level granularity. \r
-/// One structure is present for each contiguous address range described. \r
+/// This structure maps memory address space usually to a device-level granularity.\r
+/// One structure is present for each contiguous address range described.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// Built-in Pointing Device (Type 21).\r
///\r
-/// This structure describes the attributes of the built-in pointing device for the \r
+/// This structure describes the attributes of the built-in pointing device for the\r
/// system. The presence of this structure does not imply that the built-in\r
-/// pointing device is active for the system's use! \r
+/// pointing device is active for the system's use!\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// Portable Battery - Device Chemistry\r
///\r
-typedef enum { \r
+typedef enum {\r
PortableBatteryDeviceChemistryOther = 0x01,\r
PortableBatteryDeviceChemistryUnknown = 0x02,\r
PortableBatteryDeviceChemistryLeadAcid = 0x03,\r
///\r
/// Portable Battery (Type 22).\r
///\r
-/// This structure describes the attributes of the portable battery(s) for the system. \r
-/// The structure contains the static attributes for the group. Each structure describes \r
+/// This structure describes the attributes of the portable battery(s) for the system.\r
+/// The structure contains the static attributes for the group. Each structure describes\r
/// a single battery pack's attributes.\r
///\r
typedef struct {\r
///\r
/// System Reset (Type 23)\r
///\r
-/// This structure describes whether Automatic System Reset functions enabled (Status). \r
+/// This structure describes whether Automatic System Reset functions enabled (Status).\r
/// If the system has a watchdog Timer and the timer is not reset (Timer Reset)\r
-/// before the Interval elapses, an automatic system reset will occur. The system will re-boot \r
-/// according to the Boot Option. This function may repeat until the Limit is reached, at which time \r
-/// the system will re-boot according to the Boot Option at Limit. \r
+/// before the Interval elapses, an automatic system reset will occur. The system will re-boot\r
+/// according to the Boot Option. This function may repeat until the Limit is reached, at which time\r
+/// the system will re-boot according to the Boot Option at Limit.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// Hardware Security (Type 24).\r
///\r
-/// This structure describes the system-wide hardware security settings. \r
+/// This structure describes the system-wide hardware security settings.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// System Power Controls (Type 25).\r
///\r
-/// This structure describes the attributes for controlling the main power supply to the system. \r
-/// Software that interprets this structure uses the month, day, hour, minute, and second values \r
-/// to determine the number of seconds until the next power-on of the system. The presence of \r
-/// this structure implies that a timed power-on facility is available for the system. \r
+/// This structure describes the attributes for controlling the main power supply to the system.\r
+/// Software that interprets this structure uses the month, day, hour, minute, and second values\r
+/// to determine the number of seconds until the next power-on of the system. The presence of\r
+/// this structure implies that a timed power-on facility is available for the system.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// Voltage Probe (Type 26)\r
///\r
-/// This describes the attributes for a voltage probe in the system. \r
+/// This describes the attributes for a voltage probe in the system.\r
/// Each structure describes a single voltage probe.\r
///\r
typedef struct {\r
///\r
/// Cooling Device (Type 27)\r
///\r
-/// This structure describes the attributes for a cooling device in the system. \r
-/// Each structure describes a single cooling device. \r
-/// \r
+/// This structure describes the attributes for a cooling device in the system.\r
+/// Each structure describes a single cooling device.\r
+///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
UINT16 TemperatureProbeHandle;\r
///\r
/// Temperature Probe (Type 28).\r
///\r
-/// This structure describes the attributes for a temperature probe in the system. \r
-/// Each structure describes a single temperature probe. \r
+/// This structure describes the attributes for a temperature probe in the system.\r
+/// Each structure describes a single temperature probe.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
/// Electrical Current Probe (Type 29).\r
///\r
/// This structure describes the attributes for an electrical current probe in the system.\r
-/// Each structure describes a single electrical current probe. \r
+/// Each structure describes a single electrical current probe.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// Out-of-Band Remote Access (Type 30).\r
///\r
-/// This structure describes the attributes and policy settings of a hardware facility \r
-/// that may be used to gain remote access to a hardware system when the operating system \r
-/// is not available due to power-down status, hardware failures, or boot failures. \r
+/// This structure describes the attributes and policy settings of a hardware facility\r
+/// that may be used to gain remote access to a hardware system when the operating system\r
+/// is not available due to power-down status, hardware failures, or boot failures.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// Boot Integrity Services (BIS) Entry Point (Type 31).\r
///\r
-/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS). \r
-/// \r
+/// Structure type 31 (decimal) is reserved for use by the Boot Integrity Services (BIS).\r
+///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
UINT8 Checksum;\r
///\r
/// System Boot Information (Type 32).\r
///\r
-/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the \r
-/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management \r
-/// application via this structure. When used in the PXE environment, for example, \r
-/// this code identifies the reason the PXE was initiated and can be used by boot-image \r
-/// software to further automate an enterprise's PXE sessions. For example, an enterprise \r
-/// could choose to automatically download a hardware-diagnostic image to a client whose \r
+/// The client system firmware, e.g. BIOS, communicates the System Boot Status to the\r
+/// client's Pre-boot Execution Environment (PXE) boot image or OS-present management\r
+/// application via this structure. When used in the PXE environment, for example,\r
+/// this code identifies the reason the PXE was initiated and can be used by boot-image\r
+/// software to further automate an enterprise's PXE sessions. For example, an enterprise\r
+/// could choose to automatically download a hardware-diagnostic image to a client whose\r
/// reason code indicated either a firmware- or operating system-detected hardware failure.\r
///\r
typedef struct {\r
///\r
/// 64-bit Memory Error Information (Type 33).\r
///\r
-/// This structure describes an error within a Physical Memory Array, \r
+/// This structure describes an error within a Physical Memory Array,\r
/// when the error address is above 4G (0xFFFFFFFF).\r
-/// \r
+///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
UINT8 ErrorType; ///< The enumeration value from MEMORY_ERROR_TYPE.\r
} SMBIOS_TABLE_TYPE33;\r
\r
///\r
-/// Management Device - Type. \r
+/// Management Device - Type.\r
///\r
typedef enum {\r
ManagementDeviceTypeOther = 0x01,\r
} MISC_MANAGEMENT_DEVICE_TYPE;\r
\r
///\r
-/// Management Device - Address Type. \r
+/// Management Device - Address Type.\r
///\r
typedef enum {\r
ManagementDeviceAddressTypeOther = 0x01,\r
///\r
/// Management Device (Type 34).\r
///\r
-/// The information in this structure defines the attributes of a Management Device. \r
+/// The information in this structure defines the attributes of a Management Device.\r
/// A Management Device might control one or more fans or voltage, current, or temperature\r
/// probes as defined by one or more Management Device Component structures.\r
///\r
///\r
/// Management Device Component (Type 35)\r
///\r
-/// This structure associates a cooling device or environmental probe with structures \r
-/// that define the controlling hardware device and (optionally) the component's thresholds. \r
+/// This structure associates a cooling device or environmental probe with structures\r
+/// that define the controlling hardware device and (optionally) the component's thresholds.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
///\r
/// Management Device Threshold Data (Type 36).\r
///\r
-/// The information in this structure defines threshold information for \r
-/// a component (probe or cooling-unit) contained within a Management Device. \r
+/// The information in this structure defines threshold information for\r
+/// a component (probe or cooling-unit) contained within a Management Device.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
/// Memory Channel (Type 37)\r
///\r
/// The information in this structure provides the correlation between a Memory Channel\r
-/// and its associated Memory Devices. Each device presents one or more loads to the channel. \r
+/// and its associated Memory Devices. Each device presents one or more loads to the channel.\r
/// The sum of all device loads cannot exceed the channel's defined maximum.\r
///\r
typedef struct {\r
IPMIDeviceInfoInterfaceTypeKCS = 0x01, ///< The Keyboard Controller Style.\r
IPMIDeviceInfoInterfaceTypeSMIC = 0x02, ///< The Server Management Interface Chip.\r
IPMIDeviceInfoInterfaceTypeBT = 0x03, ///< The Block Transfer\r
- IPMIDeviceInfoInterfaceTypeReserved = 0x04\r
+ IPMIDeviceInfoInterfaceTypeSSIF = 0x04 ///< SMBus System Interface\r
} BMC_INTERFACE_TYPE;\r
\r
///\r
} SMBIOS_TABLE_TYPE39;\r
\r
///\r
-/// Additional Information Entry Format. \r
+/// Additional Information Entry Format.\r
///\r
-typedef struct { \r
- UINT8 EntryLength; \r
+typedef struct {\r
+ UINT8 EntryLength;\r
UINT16 ReferencedHandle;\r
UINT8 ReferencedOffset;\r
SMBIOS_TABLE_STRING EntryString;\r
UINT8 Value[1];\r
-}ADDITIONAL_INFORMATION_ENTRY;\r
+} ADDITIONAL_INFORMATION_ENTRY;\r
\r
///\r
/// Additional Information (Type 40).\r
///\r
-/// This structure is intended to provide additional information for handling unspecified \r
-/// enumerated values and interim field updates in another structure. \r
+/// This structure is intended to provide additional information for handling unspecified\r
+/// enumerated values and interim field updates in another structure.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
UINT8 NumberOfAdditionalInformationEntries;\r
- ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1]; \r
+ ADDITIONAL_INFORMATION_ENTRY AdditionalInfoEntries[1];\r
} SMBIOS_TABLE_TYPE40;\r
\r
///\r
///\r
/// Onboard Devices Extended Information (Type 41).\r
///\r
-/// The information in this structure defines the attributes of devices that \r
-/// are onboard (soldered onto) a system element, usually the baseboard. \r
-/// In general, an entry in this table implies that the BIOS has some level of \r
-/// control over the enabling of the associated device for use by the system. \r
+/// The information in this structure defines the attributes of devices that\r
+/// are onboard (soldered onto) a system element, usually the baseboard.\r
+/// In general, an entry in this table implies that the BIOS has some level of\r
+/// control over the enabling of the associated device for use by the system.\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
UINT8 DevFuncNum;\r
} SMBIOS_TABLE_TYPE41;\r
\r
+///\r
+/// Management Controller Host Interface - Interface Types.\r
+/// 00h - 3Fh: MCTP Host Interfaces\r
+///\r
+typedef enum{\r
+ MCHostInterfaceTypeNetworkHostInterface = 0x40,\r
+ MCHostInterfaceTypeOemDefined = 0xF0\r
+} MC_HOST_INTERFACE_TYPE;\r
+\r
+///\r
+/// Management Controller Host Interface - Protocol Types.\r
+///\r
+typedef enum{\r
+ MCHostInterfaceProtocolTypeIPMI = 0x02,\r
+ MCHostInterfaceProtocolTypeMCTP = 0x03,\r
+ MCHostInterfaceProtocolTypeRedfishOverIP = 0x04,\r
+ MCHostInterfaceProtocolTypeOemDefined = 0xF0\r
+} MC_HOST_INTERFACE_PROTOCOL_TYPE;\r
+\r
///\r
/// Management Controller Host Interface (Type 42).\r
///\r
///\r
typedef struct {\r
SMBIOS_STRUCTURE Hdr;\r
- UINT8 InterfaceType;\r
- UINT8 MCHostInterfaceData[1]; ///< This field has a minimum of four bytes\r
+ UINT8 InterfaceType; ///< The enumeration value from MC_HOST_INTERFACE_TYPE\r
+ UINT8 InterfaceTypeSpecificDataLength;\r
+ UINT8 InterfaceTypeSpecificData[4]; ///< This field has a minimum of four bytes\r
} SMBIOS_TABLE_TYPE42;\r
\r
+\r
+///\r
+/// Processor Specific Block - Processor Architecture Type\r
+///\r
+typedef enum{\r
+ ProcessorSpecificBlockArchTypeReserved = 0x00,\r
+ ProcessorSpecificBlockArchTypeIa32 = 0x01,\r
+ ProcessorSpecificBlockArchTypeX64 = 0x02,\r
+ ProcessorSpecificBlockArchTypeItanium = 0x03,\r
+ ProcessorSpecificBlockArchTypeAarch32 = 0x04,\r
+ ProcessorSpecificBlockArchTypeAarch64 = 0x05,\r
+ ProcessorSpecificBlockArchTypeRiscVRV32 = 0x06,\r
+ ProcessorSpecificBlockArchTypeRiscVRV64 = 0x07,\r
+ ProcessorSpecificBlockArchTypeRiscVRV128 = 0x08\r
+} PROCESSOR_SPECIFIC_BLOCK_ARCH_TYPE;\r
+\r
+///\r
+/// Processor Specific Block is the standard container of processor-specific data.\r
+///\r
+typedef struct {\r
+ UINT8 Length;\r
+ UINT8 ProcessorArchType;\r
+ ///\r
+ /// Below followed by Processor-specific data\r
+ ///\r
+ ///\r
+} PROCESSOR_SPECIFIC_BLOCK;\r
+\r
+///\r
+/// Processor Additional Information(Type 44).\r
+///\r
+/// The information in this structure defines the processor additional information in case\r
+/// SMBIOS type 4 is not sufficient to describe processor characteristics.\r
+/// The SMBIOS type 44 structure has a reference handle field to link back to the related\r
+/// SMBIOS type 4 structure. There may be multiple SMBIOS type 44 structures linked to the\r
+/// same SMBIOS type 4 structure. For example, when cores are not identical in a processor,\r
+/// SMBIOS type 44 structures describe different core-specific information.\r
+///\r
+/// SMBIOS type 44 defines the standard header for the processor-specific block, while the\r
+/// contents of processor-specific data are maintained by processor\r
+/// architecture workgroups or vendors in separate documents.\r
+///\r
+typedef struct {\r
+ SMBIOS_STRUCTURE Hdr;\r
+ SMBIOS_HANDLE RefHandle; ///< This field refer to associated SMBIOS type 4\r
+ ///\r
+ /// Below followed by Processor-specific block\r
+ ///\r
+ PROCESSOR_SPECIFIC_BLOCK ProcessorSpecificBlock;\r
+} SMBIOS_TABLE_TYPE44;\r
+\r
+///\r
+/// TPM Device (Type 43).\r
+///\r
+typedef struct {\r
+ SMBIOS_STRUCTURE Hdr;\r
+ UINT8 VendorID[4];\r
+ UINT8 MajorSpecVersion;\r
+ UINT8 MinorSpecVersion;\r
+ UINT32 FirmwareVersion1;\r
+ UINT32 FirmwareVersion2;\r
+ SMBIOS_TABLE_STRING Description;\r
+ UINT64 Characteristics;\r
+ UINT32 OemDefined;\r
+} SMBIOS_TABLE_TYPE43;\r
+\r
///\r
/// Inactive (Type 126)\r
///\r
SMBIOS_TABLE_TYPE40 *Type40;\r
SMBIOS_TABLE_TYPE41 *Type41;\r
SMBIOS_TABLE_TYPE42 *Type42;\r
+ SMBIOS_TABLE_TYPE43 *Type43;\r
+ SMBIOS_TABLE_TYPE44 *Type44;\r
SMBIOS_TABLE_TYPE126 *Type126;\r
SMBIOS_TABLE_TYPE127 *Type127;\r
UINT8 *Raw;\r
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