Update EntryPoint library header

[mirror_edk2.git] / MdePkg / Include / Library / CacheMaintenanceLib.h

diff --git a/MdePkg/Include/Library/CacheMaintenanceLib.h b/MdePkg/Include/Library/CacheMaintenanceLib.h
index 205bc2af857133a8ff097f595638e31a5adc18fd..a575ec2fc1f9db1e8d07860c275d9c43826a2a81 100644 (file)
--- a/MdePkg/Include/Library/CacheMaintenanceLib.h
+++ b/MdePkg/Include/Library/CacheMaintenanceLib.h
@@ -1,16 +1,17 @@
 /** @file\r
-       Cache Maintenance Functions\r
-\r
-       Copyright (c) 2006, Intel Corporation\r
-       All rights reserved. This program and the accompanying materials\r
-       are licensed and made available under the terms and conditions of the BSD License\r
-       which accompanies this distribution.  The full text of the license may be found at\r
-       http://opensource.org/licenses/bsd-license.php\r
-\r
-       THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
-       WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
-\r
-       Module Name:    CacheMaintenanceLib.h\r
+  Provides services to maintain instruction and data caches.\r
+  \r
+  The Cache Maintenance Library provides abstractions for basic processor cache operations.\r
+  It removes the need to use assembly in C code.\r
+    \r
+Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
+All rights reserved. This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution.  The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 **/\r
 \r
@@ -21,9 +22,6 @@
   Invalidates the entire instruction cache in cache coherency domain of the\r
   calling CPU.\r
 \r
-  Invalidates the entire instruction cache in cache coherency domain of the\r
-  calling CPU.\r
-\r
 **/\r
 VOID\r
 EFIAPI\r
@@ -53,7 +51,7 @@ InvalidateInstructionCache (
 \r
   @param  Length  The number of bytes to invalidate from the instruction cache.\r
 \r
-  @return Address\r
+  @return Address.\r
 \r
 **/\r
 VOID *\r
@@ -102,7 +100,7 @@ WriteBackInvalidateDataCache (
   @param  Length  The number of bytes to write back and invalidate from the\r
                   data cache.\r
 \r
-  @return Address\r
+  @return Address of cache invalidation.\r
 \r
 **/\r
 VOID *\r
@@ -150,7 +148,7 @@ WriteBackDataCache (
                   mode, then Address is a virtual address.\r
   @param  Length  The number of bytes to write back from the data cache.\r
 \r
-  @return Address\r
+  @return Address of cache written in main memory.\r
 \r
 **/\r
 VOID *\r
@@ -201,7 +199,7 @@ InvalidateDataCache (
                   then Address is a virtual address.\r
   @param  Length  The number of bytes to invalidate from the data cache.\r
 \r
-  @return Address\r
+  @return Address.\r
 \r
 **/\r
 VOID *\r